Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Koichiro Yamashita
Koichiro Yamashita, Kawasaki JP
| Patent application number | Description | Published |
|---|---|---|
| 20090254892 | Compiling method and compiler - A compiling method for compiling software which is adapted to output an intermediate result at a given timing, the compiling method includes extracting, by a computer, a process block related to parallel processing and conditional branch from a processing sequence included in a source code of a software which is processed time-sequentially, and generating, by the computer, an execution code by restructuring the process block that is extracted. | 10-08-2009 |
| 20090307672 | MODULE GENERATING APPARATUS, MODULE GENERATING METHOD, AND COMPUTER PRODUCT - A computer is caused to function as a parsing unit, a macroblocking analyzing unit, a junction-node restructuring unit, an identical portion merging/restructuring unit, a similar portion merging/restructuring unit, and an intermediate language restructuring unit. The parsing unit performs syntax analysis of a source code. The macroblocking analyzing unit segments the program written in the source code into blocks and appends a virtual portion representing a unique number in a statement, to a number for identifying a variable for the statement in each block to virtualize a calculation pattern. The junction-node restructuring unit extracts a node directly related to a subroutine block. The identical portion merging/restructuring unit merges pre-processing together and post-processing together for a subroutine called up at a multiple portions in the program. The similar portion merging/restructuring unit integrates subroutines having similar structures into a related subroutine. | 12-10-2009 |
| 20100235611 | COMPILER, COMPILE METHOD, AND PROCESSOR CORE CONTROL METHOD AND PROCESSOR - A compiler compiling a source code and is implemented in a plurality of processor cores includes a parallel loop processing detection unit configured to detect from the source code a loop processing code for execution of an internal processing operation for a given number of repeating times, and an independent parallel loop processing code in the internal processing operation performed for each repetition to be concurrently processed, and a dynamic parallel conversion unit configured to generate a control core code for control of the number of repeating times in the parallel loop processing code and a parallel processing code for changing the number of repeating times corresponding to the control from the control core code. | 09-16-2010 |
| 20110078413 | ARITHMETIC PROCESSING UNIT, SEMICONDUCTOR INTEGRATED CIRCUIT, AND ARITHMETIC PROCESSING METHOD - An arithmetic processing apparatus includes an arithmetic circuit; a first memory configured to store data to be processed in the arithmetic circuit; a second memory configured to be accessed through a first path by the arithmetic circuit; a preloader configured to preload the data from the second memory into the first memory through a second path; a memory controller configured to arbitrate between a first access by the arithmetic circuit using the first path and a second access by the preloader using the second path; and a scheduler configured to control the memory controller. | 03-31-2011 |
Koichiro Yamashita, Aichi JP
| Patent application number | Description | Published |
|---|---|---|
| 20110039091 | POROUS SHEET AND METHOD FOR PRODUCING THE SAME, AND HEAT INSULATING SHEET - The method for producing the porous sheet of the present invention includes the steps of (I) preparing a plurality of sheet materials that contain polytetrafluoroethylene and carbon particles and (II) stacking the plurality of sheet materials over one another and rolling the stacked sheet materials. In the method for producing the porous sheet of the present invention, step (I) and step (II) may be repeated alternately. Further, as the sheet materials to be used in the production method of the present invention, a base sheet obtained by forming a mixture containing polytetrafluoroethylene and carbon particles into sheet form also can be used, or a laminated sheet obtained by stacking a plurality of base sheets over one another and rolling them also can be used, for example. | 02-17-2011 |
Koichiro Yamashita, Toyota-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090325016 | FUEL CELL STACK - A fuel cell stack comprises a stack of three or more fuel cells, each having an assembly in which an anode electrode and a cathode electrode are respectively joined to either side of an electrolytic membrane. The anode electrode is provided nearer to one end, in the stack direction of the fuel cell, than the cathode electrode. Temperature regulating parts for regulating the temperature of the anode electrode of one fuel cell of any two adjacent fuel cells and the cathode electrode of the other fuel cell are disposed at a plurality of positions arranged in the stack direction. The provided temperature regulating parts perform temperature regulation so that the heat dissipating capability of the anode electrode is different in the stack direction from that of the cathode electrode. | 12-31-2009 |
| 20100273083 | FUEL CELL - There is disclosed a fuel cell in which an insulating material is disposed, whereby the thermal diffusion of the inside and outside of a fuel cell can be suppressed to suppress the deterioration of the performance of the fuel cell due to a temperature drop. Moreover, the physical properties of the insulating material are specified, whereby appropriate insulating properties required in the fuel cell can be obtained, and startup properties are improved. A fuel cell has a cell stack in which a plurality of unit cells are stacked, and terminal plates disposed on both sides of the cell stack in a cell stack direction thereof. The fuel cell comprises an insulating portion having an insulating material and holding plates which hold the insulating material from both the sides of the insulating material in the cell stack direction, the insulating material is held between the holding plates, and the insulating material has a thermal conductivity of 0.1 W/mK or less and a porosity of 70% or more. | 10-28-2010 |
Koichiro Yamashita, Aichi-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20090148746 | FUEL CELL - A heat insulating member is sandwiched by a first separator and a second separator. The heat insulating member functions as a heat insulating layer to prevent the temperature decrease of electricity generating cells. A first impurity removal flow path is formed in the space enclosed by the grooves on the surface of the second separator and a partition plate. A second impurity removal flow path is formed in the space enclosed by the grooves on the surface of a third separator and the partition plate. The impurity removal flow paths function as filters to remove the impurities contained in the reaction gases. A terminal functions as a current collecting layer to collect the electricity generated in the electricity generating cells. An end laminated body functions as a heat insulating layer to prevent the temperature decrease of the electricity generating cells, impurity removal layers to remove the impurities contained in the reaction gases and a current collecting layer to collect the electricity generated in the electricity generating cells. | 06-11-2009 |