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Kocaman
Alp A. Kocaman, Houston, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20110297390 | SUBSEA WELL CONTAINMENT AND INTERVENTION APARATUS - A subsea well containment and intervention apparatus. The invention provides a rigid frame that includes a set of pilings for securely affixing the apparatus to the seafloor. Buoyancy modules included in the frame make the weight of the invention more manageable when in the water. Lifting eyes are provided on the frame for installation and removal. A series of tools are attached to the frame to eliminate the need for frequent trips to the surface to replace and replenish. | 12-08-2011 |
Namik Kocaman, San Clemente, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100271120 | DISTRIBUTED THRESHOLD ADJUSTMENT FOR HIGH SPEED RECEIVERS - According to one general aspect, an apparatus may include a terminal configured to receive an analog input signal. In various embodiments, the apparatus may also include a multistage amplifier configured to amplify the analog input signal by an amount of gain. In some embodiments, the apparatus may include a distributed threshold adjuster interspersed between the stages of the multistage amplifier configured to adjust the DC voltage of the analog input signal to facilitate a decision by an analog-to-digital converter (ADC). In one embodiment, the apparatus may include the ADC configured to convert the amplified analog input signal to a digital output signal. | 10-28-2010 |
| 20110074610 | High Speed, Low Power Non-Return-To-Zero/Return-To-Zero Output Driver - A gating logic receives a non-return-to-zero (NRZ) input signal and couples the NRZ input signal as an NRZ output signal when operating in a NRZ mode of operation and converts the NRZ input signal to a return-to-zero (RZ) output signal when operating in a RZ mode of operation. A circuit coupled to the gating logic receives a clock signal and couples the clock signal to the gating logic to convert the NRZ input signal to the RZ output signal in the RZ mode of operation. In the NRZ mode of operation, the circuit decouples the clock signal and places a predetermined signal state at the gating logic to pass through the NRZ input signal as the NRZ output signal. The circuit receives a select signal to select between the NRZ and RZ modes of operation and the NRZ and RZ modes are obtained by controlling the clock signal to the gating logic. | 03-31-2011 |
| 20110291757 | DISTRIBUTED THRESHOLD ADJUSTMENT FOR HIGH SPEED RECEIVERS - According to one general aspect, a distributed threshold adjuster (DTA) may be interspersed between stages of a multistage amplifier to adjust the DC voltage of an input signal. The DTA may include an input signal terminal configured to receive the input signal. The DTA may also include a plurality of current sources configured to produce an adjustment current signal whose amperage is configured to be increased or decreased by fixed steps in order to adjust the DC voltage of the input signal. The DTA may include a control unit configured to selectively turn on or off the individual current sources of the plurality of current sources to select the amperage of the adjustment current signal. The DTA may further include an output terminal configured to produce an output signal, comprising a combination of the input signal and the adjustment current signal, to a stage of a multistage amplifier. | 12-01-2011 |
Namik Kocaman, Irvine, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080238542 | Variable gain amplifier and method for achieving variable gain amplification with high bandwidth and linearity - A fine granularity, wide-range variable gain amplifier (“VGA”) comprises an attenuator, a high gain signal path, a low gain signal path and a gain adjustment control to adjust a gain of the VGA, wherein the gain adjustment control is configured to cause a selective activation of at least a portion of the low gain signal path or the high gain signal path to achieve a desired overall gain. | 10-02-2008 |
Namik K. Kocaman, San Clemente, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080258814 | VARIABLE GAIN AMPLIFIER AND METHOD FOR ACHIEVING VARIABLE GAIN AMPLIFICATION WITH HIGH BANDWIDTH AND LINEARITY - Various example embodiments are disclosed. According to one example embodiment, a high bandwidth, fine granularity variable gain amplifier (“VGA”) may comprise an attenuator, a gain block and a gain adjustment control. The attenuator may comprise at least one pair of attenuator differential input nodes and at least one pair of attenuator differential output nodes. The gain block may comprise at least one pair of gain block differential input nodes coupled to the at least one pair of attenuator differential output nodes and at least one pair of gain block differential output nodes. The gain adjustment control may be configured to adjust a gain of the gain block. | 10-23-2008 |
Namik Kemal Kocaman, San Clemente, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100135442 | Adaptive offset adjustment algorithm - An apparatus and method is disclosed to compensate for one or more offsets in a communications signal. A communications receiver may carry out an offset adjustment algorithm to compensate for the one or more offsets. An initial search procedure determines one or more signal metric maps for one or more selected offset adjustment corrections from the one or more offset adjustment corrections. The offset adjustment algorithm determines one or more optimal points for one or more selected offset adjustment correction based upon the one or more signal maps. The adaptive offset algorithm adjusts each of the one or more selected offset adjustment corrections to their respective optimal points and/or each of one or more non-selected offset adjustment corrections to a corresponding one of a plurality of possible offset corrections to provide one or more adjusted offset adjustment corrections. A tracking mode procedure optimizes the one or more adjusted offset adjustment corrections. | 06-03-2010 |
Namik Kemal Kocaman, Irvine, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080297251 | DIGITALLY ADJUSTED VARIABLE GAIN AMPLIFIER (VGA) USING SWITCHABLE DIFFERENTIAL PAIRS - A variable gain amplifier including a stage. The stage having a set of switchable differential pairs. The stage providing a gain range to a signal and adjusting a gain of the signal. At least one differential pair in each stage is permanently enabled. The variable gain amplifier may include a plurality of cascaded stages including the stage. In addition, the variable gain amplifier may be adjusted through an interleaved thermometer coding method. | 12-04-2008 |