| Patent application number | Description | Published |
|---|
| 20080316076 | Direct RF D-to-A Conversion - A modulator described herein provides digital modulation and direct digital-to-analog conversion capable of achieving 12-bit resolution or higher for high frequency signals. The modulator comprises a digital modulator, conversion circuit, and multiplexer. The digital modulator generates a plurality of sample streams at a plurality of different sample phases that collectively represent a desired modulated digital carrier waveform modulated by a digital input signal. The conversion circuit converts the sample streams into a plurality of continuous analog signals. The multiplexer multiplexes the analog signals together to generate a modulated analog carrier signal representative of the desired modulated digital carrier waveform. | 12-25-2008 |
| 20090088085 | Apparatus and Methods for Frequency Control in a Multi-Output Frequency Synthesizer - Methods and circuits for synthesizing two or more signals phase-locked to a common reference frequency signal are disclosed. In one embodiment, a method comprises generating first and second output signals phase-locked to a reference clock signal, using first and second phase-locked loop circuits. In response to a detected frequency error in the first output signal, the first output signal is corrected by adjusting a frequency-division ratio in the first phase-locked loop circuit. The second output signal is corrected, separately from the correction to the first output signal, by adjusting a frequency-division ratio in the second phase-locked loop circuit, using an adjustment parameter calculated from the detected frequency error. In another exemplary method, first and second output signals are generated as described above, using first and second phase-locked loop circuits. The first output signal is corrected by adjusting a frequency-division ratio in the first phase-locked loop circuit and generating a control signal to adjust the frequency of the reference clock signal, in response to detected frequency error in the first output signal. Because the second output signal is derived from the common reference clock signal, adjustments to the reference clock frequency will also adjust the frequency of the second output signal. Additional adjustments to the second output signal may be applied in some embodiments by adjusting a frequency-division ratio in the second phase-locked loop circuits. Circuits for implementing the described methods are also disclosed. | 04-02-2009 |
| 20090088194 | Single Multi-Mode Clock Source for Wireless Devices - The wireless device described herein uses a single crystal oscillator to generate the high and low frequency clock signals required by the wireless device during both active and inactive radio communications. An exemplary multi-mode clock unit comprises a single crystal oscillator operable in a normal power mode and a reduced power mode, and a control unit that selectively switches the crystal oscillator between the first and second power modes based on a current clock signal quality requirement. The control unit may selectively switch between the first and second power modes by selectively varying a capacitive load of the crystal oscillator and/or by varying a drive signal of the crystal oscillator. For example, the control unit may select the normal power mode when a cellular transceiver is active, and a reduced power mode when the cellular transceiver is inactive to reduce power consumption during the inactive state. | 04-02-2009 |
| 20110151800 | Delay, Gain and Phase Estimation for Measurement Receivers - Phase and gain of a transmit signal are measured at a transmitter by determining a first time delay having a first resolution at a measurement receiver between a reference signal from which the transmit signal is generated and a measured signal derived from the transmit signal by comparing amplitudes of the reference signal and the measured signal. A second time delay having a second resolution finer than the first resolution is determined at the measurement receiver between the reference signal and the measured signal based on the first time delay. The reference signal and the measured signal are time aligned at the measurement receiver based on the second time delay and the phase and gain of the transmit signal are estimated after the reference signal and the measured signal are time aligned. | 06-23-2011 |
