Patent application number | Description | Published |
20100315140 | Compensation Of Phase Lock Loop (PLL) Phase Distribution Caused By Power Amplifier Ramping - Disclosed herein are techniques, systems, and methods relating to compensation of phase disturbances of a phase lock-loop during power ramp up or down of a power amplifier. More specifically, a phase lock-loop is described that is able to switch between type I and type II PLL modes depending on the power state of the power amplifier without introducing additional disturbances. | 12-16-2010 |
20120092048 | COMPENSATION OF PHASE LOCK LOOP (PLL) PHASE DISTRIBUTION CAUSED BY POWER AMPLIFIER RAMPING - Disclosed herein are techniques, systems, and methods relating to compensation of phase disturbances of a phase lock-loop during power ramp up or down of a power amplifier. More specifically, a phase lock-loop is described that is able to switch between type I and type II PLL modes depending on the power state of the power amplifier without introducing additional disturbances. | 04-19-2012 |
20120264381 | Multi-Standard Transceiver, Device and Method - A multi-standard transceiver includes a first subunit configured to perform signal processing according to a first communication standard and a second subunit configured to perform signal processing according to a second communication standard. Furthermore, the multi-standard transceiver includes an interference cancellation unit configured to drive an estimated interference signal from a first signal generated by the first subunit by performing the signal processing according to the first communication standard, and perform interference cancellation on a second signal generated by the second subunit by performing the signal processing according to the second communication standard based on the estimated interference signal. | 10-18-2012 |