Patent application number | Description | Published |
20110122775 | METHOD AND SYSTEM FOR ANALYZING AND QUALIFYING ROUTES IN PACKET NETWORKS - Routes of a packet network are analyzed according to various transit delay metrics. Preferred packet network routes are selected between source and destination based on these metrics. In packet networks employing boundary clocks and transparent clocks, faulty boundary clocks and faulty transparent clocks are identified using the metrics. | 05-26-2011 |
20110122871 | METHOD AND APPARATUS FOR ANALYZING AND QUALIFYING PACKET NETWORKS - Packet network performance is assessed using transit delay metrics and compliance masks generated at various evaluation nodes of the network. The evaluation nodes may employ network probes that make precise measurements of transit delays and thereby of transit delay variations. Based on the assessments, a master may be added to the network or relocated within the network, rate of timing packets generated by the master may be adjusted up or down, or oscillators used at the slaves may be upgraded. | 05-26-2011 |
20110134766 | METHOD AND APPARATUS FOR FINDING LATENCY FLOOR IN PACKET NETWORKS - A latency floor between two nodes of a packet-switched network is estimated using transit times of a group of packets traversing the two nodes. In particular, a periodically generated histogram of packet transit times is used to estimate the latency floor. In some packet-switched networks, the behavior of some network elements changes drastically when the network is congested. Because latency floor cannot be accurately estimated under such conditions, packet transit times collected during a congested state of the network are discarded. | 06-09-2011 |
20110234200 | Adaptive slip double buffer - A method includes monitoring a fill in an adaptive slip buffer of a digital to analog convertor; adjusting a number of samples that are read from the adaptive slip buffer per page as a function of the fill; and reading the number of samples from the adaptive slip buffer. An apparatus includes a digital to analog convertor including an adaptive slip buffer and a read address generator coupled to the adaptive slip buffer, wherein the read address generator includes an increment control that adjusts a number of samples that are read from the adaptive slip buffer per page as a function of fill of the adaptive slip buffer. | 09-29-2011 |
20110234902 | Synchronization of audio and video streams - A method includes synchronizing audio and video streams including applying a time-stamp to a block of a audio buffer in an audio path; applying a time-stamp to a block of a video buffer in a video path; reading the block from the audio buffer; reading the block from the video buffer; and aligning the audio path and the video path by introducing a variable delay to one member selected from the group consisting of the audio path or the video path to substantially equalize the end-to-end delay of both the audio path and the video path. An apparatus includes a digital to analog convertor for synchronizing audio and video including an audio buffer in an audio path, each block of the audio buffer having an audio time-stamp; and a video buffer in a video path, each block of the video buffer having a video time-stamp, wherein the audio path and the video path are aligned by introducing a variable delay to one member selected from the group consisting of the audio path or the video path to substantially equalize the end-to-end delay of both the audio path and the video path. | 09-29-2011 |
20110235500 | Integrated echo canceller and speech codec for voice-over IP(VoIP) - A method includes operating an integrated echo canceller and speech codec for voice-over internet protocol. An apparatus includes an echo canceller and a speech codec, wherein the speech codec includes a decoder and an encoder, and wherein the echo canceller and the speech codec are integrated for voice-over-internet protocol. | 09-29-2011 |
20130077642 | SYSTEMS AND METHODS UTILIZING RANDOMIZED CLOCK RATES TO REDUCE SYSTEMATIC TIME-STAMP GRANULARITY ERRORS IN NETWORK PACKET COMMUNICATIONS - Systems and methods are disclosed for utilizing slave (receive) time-stamp clock rates that are different from master (sender) time-stamp clock rates to randomize and thereby reduce systematic time-stamp granularity errors in the communication of network packets. The slave (receive) time-stamp clock rate for some embodiments is set to be a fixed value that has a relationship with the master (sender) time-stamp clock rate such that the ratio of the slave (receive) clock rate to the master (sender) clock rate is a rational number. Other embodiments use a time-varying frequency for the slave (receive) time-stamp clock rate to randomize the slave (receive) time-stamp clock with respect to the master (sender) time-stamp clock. Additional time-stamps can also be generated using a slave (receive) time-stamp clock having a rate set to equal the rate of the master (sender) time-stamp clock signal. Further spread spectrum and/or delta-sigma modulation techniques can be applied to effectively randomize the slave (receive) time-stamp clock. | 03-28-2013 |
20130315265 | System And Method For Direct Passive Monitoring Of Packet Delay Variation And Time Error In Network Packet Communications - Systems and methods are disclosed for direct passive monitoring of packet delay variation and time error in network packet communications. Packets traversing between slave and master clocks are monitored to provide direct results of the actual conditions without the need to rely upon inference determinations. Certain embodiments provide tap configurations to monitor packet flows, while certain other embodiments provide in-line configurations to monitor packet flows. Certain further embodiments provide multiple monitoring devices that can be used for passive monitoring purposes, such as passive monitoring to test boundary clock. These multiple monitoring devices can be configured to be within a single or different test instruments. Other variations are also described. | 11-28-2013 |
20140286357 | MANAGED TIMING ENGINE - A Managed Timing Engine (MTE) provides a primary timing output synchronized to a selected input reference from a multiplicity of input references. Additional timing outputs can be generated such that there is a programmable frequency offset (in ppb) between them and the main output. The rate (in Hz) of the outputs can be programmable. The MTE can introduce a programmable delay for periodic phase references. | 09-25-2014 |
20140351468 | Backplane Timing Distribution - A master and slave module are described that facilitate the distribution of timing, both frequency and phase over a backplane. The method is applicable over any pair of shared transmission medium. The signal transmitted from the master to the slave is suitable for delivering a frequency reference and an approximate phase. The precise phase at the slave is obtained by delaying the 1PPS by a programmable amount estimated by measuring the round-trip delay between the master and slave. | 11-27-2014 |