Kim, Singapore
Bs Kim, Singapore SG
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20130023613 | USE OF POLYAMIDES THAT ARE RESISTANT TO CORROSION AND STRESS CRACKING - The use of thermoplastic molding materials comprising | 01-24-2013 |
Choong Kim, Singapore SG
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20140057311 | Device For High Throughput Investigations Of Multi-Cellular Interactions - Provided herein are microfluidic devices that can be used as a 3D bioassay, e.g., for drug screening, personalized medicine, tissue engineering, wound healing, and other applications. The device has a series of channels {e.g., small fluid channels) in a small polymer block wherein one or more of the channels can be filled with a biologically relevant gel, such as collagen, which is held in place by posts. As shown herein, when the device is plated with cells such as endothelial cells, new blood vessels grow in the gel, which is thick enough for the cells to grow in three dimensions. Other channels, e.g., fluid channels, allow drugs or biological material to be exposed to the 3D cell growth. Cells, such as endothelial cells, can be cultured and observed as they grow on the surface of a 3D gel scaffold, where e.g., rates of angiogenesis can be measured, as well as intervascularization and extravascularization of cancerous cells. | 02-27-2014 |
Dalson Ye Seng Kim, Singapore SG
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20080280396 | STACKED DIE PACKAGE FOR PERIPHERAL AND CENTER DEVICE PAD LAYOUT DEVICE - An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed. | 11-13-2008 |
20110062583 | STACKED DIE PACKAGE FOR PERIPHERAL AND CENTER DEVICE PAD LAYOUT DEVICE - An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed. | 03-17-2011 |
Doohong Kim, Singapore SG
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20120296304 | Absorbent Article Containing Apertures Arranged in Registration with an Embossed Wave Pattern - An absorbent article that contains a topsheet having embossed regions is provided. The embossed regions propagate in a longitudinal direction of the article in the form of a wave having one or more alternating crests (peaks) and troughs (valleys). Such a wave pattern helps slow down the flow of bodily fluid by directing it along a tortuous path defined by the densified edges rather than in a straight line. Among other things, this reduction in flow rate can help provide sufficient time for the absorbent core to absorb the fluid, which is particularly helpful when it is already partially filled with fluid. Nevertheless, bodily fluids can still sometimes pool near the crests and/or troughs and result in leakage. To help counteract this tendency, the present inventors have discovered that a plurality of apertures can be employed in the topsheet that are arranged in a column that generally extends in a longitudinal direction of the article. At least a portion of the apertures are located proximate to contiguous crests and/or contiguous troughs of the embossed region. Without intending to be limited by theory, it is believed that the registration of the apertures with contiguous crests and/or contiguous troughs of the embossed region puts them in a better position to receive bodily fluids that tend to pool around the embossed regions and thus reduce the likelihood of leakage. | 11-22-2012 |
20150141946 | ABSORBENT ARTICLE HAVING ENHANCED LEAKAGE PROTECTION - An absorbent article ( | 05-21-2015 |
Eng Seng Kim, Singapore SG
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20140235468 | HIGH THROUGHPUT MINIATURIZED ASSAY SYSTEM AND METHODS - The present invention provides an apparatus for conducting biological assays which employs “virtual wells” in lieu of the physical wells of conventional array plates. Also provided are methods of processing a sample and/or culturing cells using the apparatus and systems described herein. In some embodiments, the apparatus includes a first structure having a sheet layer with a plurality of discrete through holes; and a second structure coupled to the first structure, the second structure including a base layer. At least a portion of a first surface of the sheet layer of the first structure is exposed from the second structure, and a second surface of the sheet layer, opposite to the first surface of the sheet layer, is embedded in the base layer of the second structure adjacent the first surface of the base layer. | 08-21-2014 |
In Ki Kim, Singapore SG
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20080246159 | PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device. | 10-09-2008 |
20110266688 | PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device. | 11-03-2011 |
In Suk Kim, Singapore SG
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20110062568 | FOLDED LANDS AND VIAS FOR MULTICHIP SEMICONDUCTOR PACKAGES - Semiconductor packages and methods for making and using the same are described. The semiconductor packages contain a lead frame that has been folded to create folded leads that form a customized array of land pads and vias. The lead frame contains both longer folded lead and shorter folded leads. The longer leads can be folded so that an upper part of the longer leads form vias, the lower part forms part of a land pad array, and a substantially flat part that is connected to a first die containing an IC. The shorter leads can be folded so that a lower part forms part of a land pad array and the short leads are connected to a second die containing in IC. The folded leads can be routed according to the requirements of each specific IC die to which they are connected and therefore can support multiple dies in the semiconductor package. Other embodiments are also described. | 03-17-2011 |
In Suk Kim, Singapore PH
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20110193206 | STACKABLE SEMICONDUCTOR PACKAGE WITH EMBEDDED DIE IN PRE-MOLDED CARRIER FRAME - Semiconductor packages that contain multiple stacked chips that are embedded in a pre-molded carrier frame and methods for making such semiconductor packages are described. The semiconductor packages contain a full land pad array and multiple chips that are stacked vertically. The land pad array contains inner terminals that are formed by first stud bumps that are located on a lower die. The land pad array also contains middle terminals that are formed by first conductive vias in a first molding layer embedding the first die. The first conductive vias are connected to second stud bumps that are located on a second die that is embedded in a second molding layer. The second molding layer contains second conductive vias that are connected to a carrier frame, the bottom of which forms the outer terminals of the land pad array. The semiconductor packages therefore have a high input/output capability with a small package footprint, and a flexible routing capability that are especially useful for portable and ultra-portable electronic apparatus. Other embodiments are also described. | 08-11-2011 |
In-Tchang Kim, Singapore SG
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20110270744 | MOBILE TANGIBLE VALUE BANKING SYSTEM - A mobile tangible value banking system is disclosed. A mobile tangible value banking system enables a consumer entity to make a withdrawal from or deposit to their bank account by physically exchanging tangible value with a banking agent and correspondingly verifying the deposit or withdrawal using a mobile device. The consumer entity and the banking agent may be mobile and free to meet in a predetermined location, which may allow banking services to enter remote areas of emerging markets. | 11-03-2011 |
Min Hwan Kim, Singapore SG
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20080246159 | PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device. | 10-09-2008 |
20110266688 | PLANARIZED PASSIVATION LAYER FOR SEMICONDUCTOR DEVICES - A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device. | 11-03-2011 |
Nam Yong Kim, Singapore SG
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20100000304 | Apparatus For Performing a Reaction In a Droplet and Method of Using the Same - An apparatus for processing a biological and/or chemical sample in a liquid droplet ( | 01-07-2010 |
20100285573 | Apparatus for processing a sample in a liquid droplet and method of using the same - The invention provides an apparatus and a method of processing a biological and/or chemical sample in a liquid droplet. The apparatus comprises a processing compartment, which is defined by a reservoir and an immobilisation member. The processing compartment is further adapted to accommodate a medium, which is immiscible with the liquid droplet, and of a lower surface energy than the liquid of the liquid droplet. The reservoir is defined by a circumferential wall and a base. The immobilisation member is arranged within the reservoir and comprises a surface that is patterned in such a way that it comprises at least one predefined immobilisation area. The predefined immobilisation area within the patterned surface is of a higher surface energy than the medium. Furthermore the at least one predefined area is of a higher surface energy than the remaining surface and of a sufficient width in the plane of the surface to allow, in said hydrophobic medium, the immobilisation of the liquid droplet on the hydrophilic area via hydrophilic-hydrophilic or hydrophobic-hydrophobic interactions. The remaining surface is of at most about the same surface energy as the medium. In the method of the invention the medium is disposed into the apparatus, such that the predefined immobilisation area is entirely covered by the medium. The liquid droplet is disposed onto the predefined immobilisation area, whereby the liquid droplet is immobilised thereon via hydrophilic-hydrophilic or hydrophobic-hydrophobic interactions. A process is performed on the biological and/or chemical sample in said liquid droplet. | 11-11-2010 |
Seong-Jin Kim, Singapore SG
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20160139024 | EVENT-DRIVEN COULTER COUNTER IC FOR HIGH THROUGHPUT PARTICLE COUNTING - A particle occurrence sensing circuit for microfluidic particle sensing includes a set of particle event indicators, each of which includes: a Coulter counter having a sensing electrode exposable to a fluid within a microfluidic channel and configured for providing a particle sensing signal; an input stage configured for providing an extracted particle sensing signal; and a particle event detector configured for providing a set of particle event occurrence signals. Each of the set of particle event occurrence signals indicates a sensed occurrence of a particle greater than or equal to a given reference particle size during fluid flow through the microfluidic channel to which the sensing electrode is exposed. The particle event detector includes a successive approximation (SA) analog-to-digital converter (ADC) configured for generating a plurality of reference particle size threshold values and successively comparing the extracted particle sensing signal amplitude with reference particle size threshold values. | 05-19-2016 |
Sung Soo Kim, Singapore SG
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20140165389 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE GRID ARRAY LEAD FRAME - System and method of manufacturing an integrated circuit packaging system using routable grid array lead frame. Method includes providing a lead frame having top metal connector and bottom contact, and treating the top metal connector with an additive, or the bottom contact with an additive, or both. Concomitant to the treatment process, insulation cover or bottom encapsulation can be formed about the top metal connector or the bottom contact with respective openings. Upon coupling the interconnects to the lead frame the interconnects do not exceed the metal contacts by more than about 60% due to the treatment process. | 06-19-2014 |
20150279815 | Semiconductor Device and Method of Forming Substrate Having Conductive Columns - A semiconductor device has a first conductive layer disposed over a carrier. A second conductive layer is formed over a first surface of the first conductive layer. A first insulating layer is formed over the first and second conductive layers. A third conductive layer is formed over the first insulating layer. A second insulating layer is formed over the third conductive layer. The carrier is removed to expose the first conductive layer. A portion of the first conductive layer is removed from a second surface of the first conductive layer opposite the first surface to form a plurality of conductive pillars. The conductive pillars include a height of 100 micrometers or greater. The portion of the first conductive layer is removed using an etching process. The conductive pillars are disposed over a first semiconductor package. A semiconductor die or second semiconductor package is disposed over the second conductive layer. | 10-01-2015 |
Thng Chong Kim, Singapore SG
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20150034975 | OPTOELECTRONIC MODULES THAT HAVE SHIELDING TO REDUCE LIGHT LEAKAGE OR STRAY LIGHT, AND FABRICATION METHODS FOR SUCH MODULES - Various optoelectronic modules are described that include an optoelectronic device (e.g., a light emitting or light detecting element) and a transparent cover. Non-transparent material is provided on the sidewalls of the transparent cover, which, in some implementations, can help reduce light leakage from the sides of the transparent cover or can help prevent stray light from entering the module. Fabrication techniques for making the modules also are described. | 02-05-2015 |
20150036046 | OPTOELECTRONIC MODULES THAT HAVE SHIELDING TO REDUCE LIGHT LEAKAGE OR STRAY LIGHT, AND FABRICATION METHODS FOR SUCH MODULES - Optoelectronic modules include an optoelectronic device and a transparent cover. A non-transparent material is provided on the sidewalls of the transparent cover, which can help reduce light leakage from the sides of the transparent cover or can help reduce stray light from entering the module. The modules can be fabricated, for example, in wafer-level processes. In some implementations, openings such as trenches are formed in a transparent wafer. The trenches then can be filled with a non-transparent material using, for example, a vacuum injection tool. When a wafer-stack including the trench-filled transparent wafer subsequently is separated into individual modules, the result is that each module can include a transparent cover having sidewalls that are covered by the non-transparent material. | 02-05-2015 |
20150325613 | OPTOELECTRONIC MODULES THAT HAVE SHIELDING TO REDUCE LIGHT LEAKAGE OR STRAY LIGHT, AND FABRICATION METHODS FOR SUCH MODULES - Optoelectronic modules include an optoelectronic device and a transparent cover. A non-transparent material is provided on the sidewalls of the transparent cover, which can help reduce light leakage from the sides of the transparent cover or can help reduce stray light from entering the module. The modules can be fabricated, for example, in wafer-level processes. In some implementations, openings such as trenches are formed in a transparent wafer. The trenches then can be filled with a non-transparent material using, for example, a vacuum injection tool. When a wafer-stack including the trench-filled transparent wafer subsequently is separated into individual modules, the result is that each module can include a transparent cover having sidewalls that are covered by the non-transparent material. | 11-12-2015 |
Whye Ghee Kim, Singapore SG
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20110110778 | MEASURING LOADS ON WIND TURBINE BLADES - A sensor system for measuring aerodynamic loads acting on a wind turbine rotor blade is disclosed. The measured aerodynamic loads can be converted to an angle of attack of the resulting wind which flows past the moving rotor blade. The sensor is realised as a trailing edge flap which is elastically moveable relative the main part of the wind turbine blade. By measuring motion of the trailing edge flap or corresponding motions of components of the sensor system, the aerodynamic forces acting on the blade can be determined. Due to the relative small dimensions of the sensor flap and the relative small displacements of the flap, the sensor system only affects the aerodynamic properties insignificantly. | 05-12-2011 |
20120224965 | CONTROL OF WIND TURBINE BLADE LIFT REGULATING MEANS - The invention involves a wind turbine comprising at least one blade ( | 09-06-2012 |
20140363293 | WIND TURBINE AND A METHOD FOR DETERMINING THE PRESENCE AND/OR THICKNESS OF AN ICE LAYER ON A BLADE BODY OF A WIND TURBINE - A wind turbine comprising an elongated blade body, a system for detecting an ice layer on the blade body, the system comprising a light source for emitting a light beam; a light splitting optical element optically connected to the light source so as to receive the light beam emitted from the light source, the optical element adapted to split the light beam received from the light source into a reference light beam and a detecting light beam, a boundary area which is arranged at the blade body so as to be exposed to the outer surroundings of the blade body and which is optically connected to the light splitting optical element such as to receive the detecting light beam and to reflect an internal reflected part of the detecting light beam at the boundary area and to transmit a transmitting part of the detecting light beam to the outer surroundings of the blade body through the boundary area and to allow an external reflected part of the transmitting part of the detecting light beam, which has been reflected from outside of the blade body, to be re-transmitted through the boundary area, a light measuring device optically connected to the light splitting optical element so as to receive the reference light beam, the internal reflected part of the detecting light beam and the external reflected part of the detecting light beam, wherein the light measuring device is configured to analyze the received light and to determine the presence and/or thickness of an ice layer on the blade body dependent on the analysis. | 12-11-2014 |
Yoong Kim, Singapore SG
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20130171346 | FLUORINATED CORE-SHELL-POLYMERS AND PROCESS FOR PREPARING SAME - Disclosed is a process for preparing fluorinated core-shell polymer particles in which the core is a non-fluorinated polymer and the shell is derived from at least 50% by weight of fluorinated monomers, by 1) synthesizing a core polymer latex by aqueous emulsion polymerization of non-fluorinated monomers forming the core polymer, 2) adding the shell-forming fluorinated monomers or mixtures of at least 50% by weight of fluorinated monomers with non-fluorinated monomers to the core polymer latex of step 1) and allowing for at least one hour of equilibration time in which essentially no polymerization of the shell monomers occurs, 3) reacting the shell-forming monomers in the mixture from step 2) to form the core-shell polymer particles, wherein the process steps 1) to 3) are carried out under mechanical stirring in the absence of surfactants, emulsifiers, emulsifying monomers and mixtures thereof. | 07-04-2013 |