Patent application number | Description | Published |
20080211524 | Electrochemically Fabricated Microprobes - Multilayer probe structures for testing semiconductor die are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments the structures may include generally helical shaped configurations, helical shape configurations with narrowing radius as the probe extends outward from a substrate, bellows-like configurations, and the like. In some embodiments arrays of multiple probes are provided. | 09-04-2008 |
20090065142 | Method of Electrochemically Fabricating Multilayer Structures Having Improved Interlayer Adhesion - Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers. | 03-12-2009 |
20090066351 | ELECTROCHEMICALLY FABRICATED MICROPROBES - Multilayer test probe structures are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments each probe structure may include a plurality of contact arms or contact tips that are used for contacting a specific pad or plurality of pads wherein the arms and/or tips are configured in such away so as to provide a scrubbing motion (e.g. a motion perpendicular to a primary relative movement motion between a probe carrier and the IC) as the probe element or array is made to contact an IC, or the like, and particularly when the motion between the probe or probes and the IC occurs primarily in a direction that is perpendicular to a plane of a surface of the IC. In some embodiments arrays of multiple probes are provided and even formed in desired relative position simultaneously. | 03-12-2009 |
20090256583 | Vertical Microprobes for Contacting Electronic Components and Method for Making Such Probes - Multilayer probe structures for testing or otherwise making electrical contact with semiconductor die or other electronic components are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments the structures may include configurations intended to enhance functionality, buildability, or both. | 10-15-2009 |
20100134131 | Electrochemically Fabricated Microprobes - Multilayer probe structures for testing semiconductor die are electrochemically fabricated via depositions of one or more materials in a plurality of overlaying and adhered layers. In some embodiments the structures may include generally helical shaped configurations, helical shape configurations with narrowing radius as the probe extends outward from a substrate, bellows-like configurations, and the like. In some embodiments arrays of multiple probes are provided. | 06-03-2010 |
20100155253 | Microprobe Tips and Methods for Making - Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate. Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of the tip material around carefully sized and placed etching shields, via hot pressing, and the like. | 06-24-2010 |
20100270165 | Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates - Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer. | 10-28-2010 |
20110155580 | Method of Electrochemically Fabricating Multilayer Structures Having Improved Interlayer Adhesion - Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers. | 06-30-2011 |
20120222960 | Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature - Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion. | 09-06-2012 |
20140134453 | Multi-Layer, Multi-Material Micro-Scale and Millimeter-Scale Devices with Enhanced Electrical and/or Mechanical Properties - Some embodiments of the invention are directed to electrochemical fabrication methods for forming structures or devices (e.g. microprobes for use in die level testing of semiconductor devices) from a core material and a shell or coating material that (1) partially coats the surface of the structure, (2) completely coats the surface of the structure, and/or (3) completely coats the surface of structural material of each layer from which the structure is formed including interlayer regions. These embodiments incorporate both the core material and the shell material into the structure as each layer is formed along with a sacrificial material that is removed after formation of all layers of the structure. In some embodiments the core material may be a material that would be removed with sacrificial material if it were accessible by an etchant during removal of the sacrificial material. | 05-15-2014 |
20140209473 | Electrochemical Fabrication Methods Incorporating Dielectric Materials and/or Using Dielectric Substrates - Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer. | 07-31-2014 |
20140216941 | Method of Electrochemically Fabricating Multilayer Structures Having Improved Interlayer Adhesion - Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers. | 08-07-2014 |
20140238865 | Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature - Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion. | 08-28-2014 |
Patent application number | Description | Published |
20100109475 | SURFACE ACOUSTIC WAVE ELEMENT, SURFACE ACOUSTIC WAVE DEVICE AND METHODS FOR MANUFACTURING THE SAME - A surface acoustic wave (“SAW”) element includes a substrate which is formed of a piezoelectric material, a plurality of first electrodes which are disposed on the substrate and separated from each other, a plurality of second electrodes which are disposed on the substrate and are separated from the first electrodes and are separated from each other, and oxide films which are disposed on the respective plurality of first electrodes and the plurality of second electrodes. | 05-06-2010 |
20100117004 | SURFACE ACOUSTIC WAVE DEVICE AND METHOD FOR SIGNAL AMPLIFICATION OF SURFACE ACOUSTIC WAVE ELEMENT - A surface acoustic wave (“SAW”) device including a SAW element, a first material, a luminescence material and a light source, and a method for signal amplification of a SAW element. The first material may be positioned on the SAW element and bound to a target material in a sample. The luminescence material may be bound to the target material. The light source may apply light to the luminescence material. The SAW device and the method for signal amplification of a SAW element using the same allow amplification of a signal of the SAW element by an electromagnetic wave generated when light is applied to the luminescence material. | 05-13-2010 |
20120142176 | Methods of Forming Semiconductor Devices - Methods of forming semiconductor devices are provided. The methods may include forming a gate pattern on an active region of a substrate. The methods may further include performing a deoxidization treatment on the substrate. | 06-07-2012 |
20120238066 | METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH SILICON-GERMANIUM CHANNELS INCLUDING HYDROGEN - A semiconductor device is fabricated by providing a substrate including a silicon channel layer and a silicon-germanium channel layer, forming gate structures disposed on the silicon channel layer and on the silicon-germanium channel layer, forming a first protection layer to cover the resultant structure including the gate structures, and injecting hydrogen and/or its isotopes into the silicon-germanium channel layer. The silicon and silicon-germanium channel layers may be oriented along a <100> direction. Related devices are also described. | 09-20-2012 |
20140084379 | SEMICONDUCTOR DEVICES WITH SILICON-GERMANIUM CHANNELS INCLUDING HYDROGEN - A semiconductor device is fabricated by providing a substrate including a silicon channel layer and a silicon-germanium channel layer, forming gate structures disposed on the silicon channel layer and on the silicon-germanium channel layer, forming a first protection layer to cover the resultant structure including the gate structures, and injecting hydrogen and/or its isotopes into the silicon-germanium channel layer. The silicon and silicon-germanium channel layers may be oriented along a <100> direction. Related devices are also described. | 03-27-2014 |