Patent application number | Description | Published |
20090042353 | INTEGRATED CIRCUIT FABRICATION PROCESS FOR A HIGH MELTING TEMPERATURE SILICIDE WITH MINIMAL POST-LASER ANNEALING DOPANT DEACTIVATION - Post-laser annealing dopant deactivation is minimized by performing certain silicide formation process steps prior to laser annealing. A base metal layer of nickel is deposited on the source-drain regions and the gate electrode, followed by deposition of an overlying layer of a metal having a higher melting temperature than nickel. Thereafter, a rapid thermal process is performed to heat the substrate sufficiently to form metal silicide contacts at the top surfaces of the source-drain regions and of the gate electrode. The method further includes removing the remainder of the metal-containing layer and then depositing an optical absorber layer over the substrate prior to laser annealing. | 02-12-2009 |
20090042354 | INTEGRATED CIRCUIT FABRICATION PROCESS USING A COMPRESSION CAP LAYER IN FORMING A SILICIDE WITH MINIMAL POST-LASER ANNEALING DOPANT DEACTIVATION - Post-laser annealing dopant deactivation is minimized by performing certain silicide formation process steps prior to laser annealing. A base metal layer is deposited on the source-drain regions and the gate electrode, followed by deposition of an overlying compression cap layer, to prevent metal agglomeration at the silicon melting temperature. Thereafter, a rapid thermal process is performed to heat the substrate sufficiently to form metal silicide contacts at the top surfaces of the source-drain regions and of the gate electrode. The method further includes removing the remainder of the metal-containing layer and then depositing an optical absorber layer over the substrate prior to laser annealing near the silicon melting temperature. | 02-12-2009 |
20090042376 | INTEGRATED CIRCUIT FABRICATION PROCESS WITH MINIMAL POST-LASER ANNEALING DOPANT DEACTIVATION - Post-laser annealing dopant deactivation is minimized by performing certain low temperature process steps prior to laser annealing. | 02-12-2009 |
20090246972 | METHODS FOR MANUFACTURING HIGH DIELECTRIC CONSTANT FILM - Processes for making a high K (dielectric constant) film using an ultra-high purity hafnium containing organometallic compound are disclosed. Also described are devices incorporating high K films made with high purity hafnium containing organometallic compounds. | 10-01-2009 |
20130200518 | Devices Including Metal-Silicon Contacts Using Indium Arsenide Films and Apparatus and Methods - Described are apparatus and methods for forming films comprise indium and arsenic. In particular, these films may be formed in a configuration of two or more chambers under “load lock” conditions. These films may include additional components as dopants, such as aluminum and/or gallium. Such films can be used in metal/silicon contacts having low contact resistances. Also disclosed are devices including the films comprising indium arsenide. | 08-08-2013 |
20130280918 | METHODS AND APPARATUS FOR FORMING SILICON PASSIVATION LAYERS ON GERMANIUM OR III-V SEMICONDUCTOR DEVICES - Described are apparatus and methods for forming silicon interfacial layers on germanium or III-V materials. Such silicon layers may be deposited by atomic layer deposition at specific temperatures to avoid interdiffusion of silicon and the germanium or III-V material. | 10-24-2013 |
20140065798 | METHOD AND APPARATUS FOR FORMING GATE STACK ON Si, SiGe or Ge CHANNELS - Provided are methods and apparatus for functionalizing a substrate surface used as the channel in a gate stack. Silicon, germanium and silicon germanium substrates surfaces are functionalized with one or more of sulfur and selenium by plasma processing. | 03-06-2014 |
20140065842 | Methods And Apparatus For Forming Tantalum Silicate Layers On Germanium Or III-V Semiconductor Devices - Described are apparatus and methods for forming tantalum silicate layers on germanium or III-V materials. Such tantalum silicate layers may have Si/(Ta+Si) atomic ratios from about 0.01 to about 0.15. The tantalum silicate layers may be formed by atomic layer deposition of silicon oxide and tantalum oxide, followed by interdiffusion of the silicon oxide and tantalum oxide layers. | 03-06-2014 |