| Patent application number | Description | Published |
|---|
| 20090045469 | Semiconductor Device and Manufacturing Method Thereof - A semiconductor device including a silicon substrate; a gate insulating film on the silicon substrate; a gate electrode on the gate insulating film; and source/drain regions formed in the substrate on both sides of the gate electrode, wherein the gate electrode includes a first silicide layered region formed of a silicide of a metal M | 02-19-2009 |
| 20090115002 | Semiconductor Device - There is provided a semiconductor device including: a first field effect transistor region including a gate insulating film, a gate electrode and gate sidewalls formed in a P channel forming region; and a second field effect transistor region including a gate insulating film, a gate electrode and gate sidewalls formed in an N channel forming region on a semiconductor substrate, wherein in the first and second field effect transistor regions, the gate electrodes are composed primarily of a silicide of metal M represented as M(x)Si(1−x)(0| 05-07-2009 | |
| 20090166748 | Semiconductor device and method of manufacturing the same - A semiconductor device including a silicon substrate and a field effect transistor including a gate insulating film on the silicon substrate, a gate electrode on the gate insulating film, and source/drain regions formed in the substrate on opposite sides of the gate electrode, wherein the gate electrode includes a silicide layer containing an Ni | 07-02-2009 |
| 20090170252 | Formation method of metallic compound layer, manufacturing method of semiconductor device, and formation apparatus for metallic compound layer - A formation method of a metallic compound layer includes preparing, in a chamber, a substrate having a surface on which a semiconductor material of silicon, germanium, or silicon germanium is exposed, and forming a metallic compound layer, includes: supplying a raw material gas containing a metal for forming a metallic compound with the semiconductor material to the chamber; heating the substrate to a temperature at which the raw material gas is pyrolyzed; and forming a metallic compound layer by reaction of the metal with the semiconductor material so that no layer of the metal is deposited on the substrate. A manufacturing method of a semiconductor device employs this formation method of a metallic compound layer. | 07-02-2009 |
| 20090250757 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - There is provided a semiconductor device having excellent device characteristics and reliability in which V | 10-08-2009 |
| 20100084713 | Semiconductor device manufacturing method and semiconductor device - A second mask is provided so as to cover a second gate pattern and a first gate pattern is heated to a temperature at which a material gas containing a first metal thermally decomposes, polysilicon constituting the first gate pattern is reacted with the first metal for silicidation under the conditions that the layer of the first metal does not deposit, and thus the first gate pattern is turned into a first gate electrode constituted by a silicide of the first metal. After the second mask is removed, a first mask is provided so as to cover the first electrode and the second gate pattern is heated to a temperature at which the material gas thermally decomposes, polysilicon constituting the second gate pattern is reacted with the first metal for silicidation under the conditions that the layer of the first metal does not deposit, and thus the second gate pattern is turned into a second gate electrode constituted by the silicide of the first metal. Then, the first mask is removed. With such a manufacturing method, a silicide layer is formed without adding an annealing process. | 04-08-2010 |
| 20100155844 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - There is provided a semiconductor device having excellent device characteristics in which V | 06-24-2010 |
| 20100176363 | VARIABLE RESISTANCE ELEMENT AND SEMICONDUCTOR DEVICE PROVIDED WITH THE SAME - A variable resistance element includes: a first electrode; a variable resistance material layer formed on the first electrode; and a second electrode formed on this variable resistance material layer. The variable resistance material layer is made of an uncrystallized material including a transition metal oxide, which is an oxide of a transition metal M | 07-15-2010 |
| 20100181624 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - A semiconductor device includes a gate electrode line provided to extend from an N-type area through a device isolation area to a P-type area, and source/drain diffused regions formed in N-type and P-type areas. The gate electrode line includes a first silicide region which configures a P-type MOSFET gate electrode and includes therein a silicide of metal M | 07-22-2010 |
| 20110001110 | RESISTANCE CHANGE ELEMENT AND MANUFACTURING METHOD THEREOF - A resistance change element including: a lower electrode formed on at least one of a semiconductor and insulating substrate; a resistance change material layer formed on the lower electrode and including a transition metal oxide as a major component; and an upper electrode formed on the resistance change material layer. The resistance change material layer is formed of a nickel oxide containing nickel vacancy and having a higher oxygen concentration than a stoichiometric composition, and has a stacked structure with different composition ratios. | 01-06-2011 |
| 20110006278 | VARIABLE RESISTANCE NON-VOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A variable resistance non-volatile memory device of the laminated structure of an upper electrode a variable resistance material a lower electrode includes an insulating film formed for being contacted with the variable resistance material and a reset electrode formed for being contacted with the insulating film without being contacted with the upper electrode or the lower electrode. The device is reset by applying a voltage to the reset electrode. A low resistance value for the set state and a high resistance value for the reset state may be obtained as the current during the reset operation of the device is reduced. A low reset current and a high resistance ratio between the resistance value for the set state and that for the reset state are simultaneously achieved. | 01-13-2011 |
