Patent application number | Description | Published |
20080212818 | AUDIO SYSTEM WITH SYNTHESIZED POSITIVE IMPEDANCE - An audio system including an audio power amplifier, a transducer electrically connected to the audio power amplifier, an enclosure coupled to the transducer, and a secondary resonant element coupled to the enclosure. An electrical feedback signal representative of the transducer current is negatively fed back to the audio power amplifier to synthesize a positive output impedance. | 09-04-2008 |
20120256685 | Power Supply with Tickle Pulse Injection - A power supply injects a series of “tickle” pulses into a pulse width modulated (PWM) controller to induce the controller to generate PWM pulses at a minimum switching frequency, preferably one that is super-sonic (especially for audio applications). The switching frequency may also be selected or controlled such that it avoids resonances in the power supply. The “tickle” pulses may be clocked by the same clock that times the PWM controller, and they may be shaped to help ensure that the power supply maintains some regulation during low-load conditions. | 10-11-2012 |
20130182859 | AUDIO SYSTEM WITH SYNTHESIZED POSITIVE IMPEDANCE - An electrical apparatus to sense current through a load includes a first input terminal having a first input voltage relative to a reference, a second input terminal having a second input voltage relative to the reference, a first load terminal of the load having a first load voltage relative to the reference, a second load terminal of the load having a second load voltage relative to the reference, a first current sensing element connected between the first input terminal and the first load terminal and a second current sensing element connected between the second input terminal and the second load terminal. A first sense voltage is determined by a relationship between the first input voltage and the second load voltage and a second sense voltage is determined by a relationship between the second input voltage and the first load voltage. | 07-18-2013 |
20140285263 | Power Supply with Tickle Pulse Injection - A power supply injects a series of “tickle” pulses into a pulse width modulated (PWM) controller to induce the controller to generate PWM pulses at a minimum switching frequency, preferably one that is super-sonic (especially for audio applications). The switching frequency may also be selected or controlled such that it avoids resonances in the power supply. The “tickle” pulses may be clocked by the same clock that times the PWM controller, and they may be shaped to help ensure that the power supply maintains some regulation during low-load conditions. | 09-25-2014 |
20150100824 | Power Sequencing and Data Hardening Architecture - The various implementations described herein include systems, methods and/or devices used to enable power sequencing and a data hardening module in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is lower than an under-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is lower than the under-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device. | 04-09-2015 |
20150127999 | System and Method for Adjusting Trip Points within a Storage Device - The embodiments described herein include a method and device for adjusting trip points within a storage device. The method includes: obtaining one or more configuration parameters; and based on the one or more configuration parameters, determining a trip voltage. The method also includes comparing the trip voltage with an input voltage. The method further includes triggering a power fail condition in accordance with a determination that the input voltage is less than the trip voltage. | 05-07-2015 |
20150135008 | Simulated Power Failure and Data Hardening - The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, a method includes, in response to a first signal received by the storage device, performing a soft power fail operation on a first section of the storage device. The soft power fail operation including: (1) signaling a power fail condition to a first plurality of controllers on the storage device, where the first plurality of controllers correspond to the first section of the storage device, (2) transferring data held in volatile memory of the storage device to non-volatile memory of the storage device, and (3) removing power from the first plurality of controllers. | 05-14-2015 |
20150149700 | DIMM Device Controller Supervisor - The various implementations described herein include systems, methods and/or devices used to enable performing supervisory functions for a dual in-line memory module (DIMM), at a controller in the DIMM. The method includes upon power-up, determining a power supply voltage provided to the DIMM. In accordance with a determination that power supply criteria are satisfied, the method includes: (1) performing one or more power-up operations, including initiating a usage counter, (2) monitoring a temperature of the DIMM, (3) monitoring the DIMM for occurrence of one or more of a set of predetermined trigger events, and (4) in response to detecting one of the set of predetermined trigger events, logging information corresponding to the detected predetermined event. | 05-28-2015 |
20150149806 | Hard Power Fail Architecture - The various implementations described herein include systems, methods and/or devices used to enable power sequencing and data hardening in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is higher than an over-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is higher than the over-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device. | 05-28-2015 |
20150149825 | Power Fail Latching Based on Monitoring Multiple Power Supply Voltages in a Storage Device - The various embodiments described herein include systems, methods and/or devices used to enable power fail latching based on monitoring multiple power supply voltages in a storage device. In one aspect, the method includes: (1) determining whether a first power supply voltage provided to the storage device is out of range for a first time period, (2) determining whether a second power supply voltage provided to the storage device is out of range for a second time period, and (3) in accordance with a determination that at least one of the first power supply voltage is out of range for the first time period and the second power supply voltage is out of range for the second time period, latching a power fail condition. | 05-28-2015 |