| Patent application number | Description | Published |
|---|
| 20110169016 | MOSFET AND METHOD FOR MANUFACTURING MOSFET - A MOSFET includes: a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. The MOSFET has a sub-threshold slope of not more than 0.4 V/Decade. | 07-14-2011 |
| 20110175110 | MOSFET AND METHOD FOR MANUFACTURING MOSFET - A MOSFET includes a silicon carbide (SiC) substrate having a main surface having an off angle of not less than 50° and not more than 65° relative to a {0001} plane; a semiconductor layer formed on the main surface of the SiC substrate; and an insulating film formed in contact with a surface of the semiconductor layer. When the insulating film has a thickness of not less than 30 nm and not more than 46 nm, the threshold voltage thereof is not more than 2.3V. When the insulating film has a thickness of more than 46 nm and not more than 100 nm, the threshold voltage thereof is more than 2.3 V and not more than 4.9 V. | 07-21-2011 |
| 20110180813 | INSULATED GATE BIPOLAR TRANSISTOR - An IGBT, which is capable of reducing on resistance by reducing channel mobility, includes: an n type substrate made of SiC and having a main surface with an off angle of not less than 50° and not more than 65° relative to a plane orientation of {0001}; a p type reverse breakdown voltage holding layer made of SiC and formed on the main surface of the substrate; an n type well region formed to include a second main surface of the reverse breakdown voltage holding layer; an emitter region formed in the well region to include the second main surface and including a p type impurity at a concentration higher than that of the reverse breakdown voltage holding layer; a gate oxide film formed on the reverse breakdown voltage holding layer; and a gate electrode formed on the gate oxide film. In a region including an interface between the well region and the gate oxide film, a high-concentration nitrogen region is formed to have a nitrogen concentration higher than those of the well region and the gate oxide film. | 07-28-2011 |
| 20110180814 | INSULATED GATE FIELD EFFECT TRANSISTOR - A MOSFET, which is capable of reducing on resistance by reducing channel mobility even when a gate voltage is high, includes: an n type substrate made of SiC and having a main surface with an off angle of 50°-65° relative to a {0001} plane; an n type reverse breakdown voltage holding layer made of SiC and formed on the main surface of the substrate; a p type well region formed in the reverse breakdown voltage holding layer distant away from a first main surface thereof; a gate oxide film formed on the well region; an n type contact region disposed between the well region and the gate oxide film; a channel region connecting the n type contact region and the reverse breakdown voltage holding layer; and a gate electrode disposed on the gate oxide film. In a region including an interface between the channel region and the gate oxide film, a high-concentration nitrogen region is formed. | 07-28-2011 |
| 20110186862 | SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - There is provided a silicon carbide semiconductor device having excellent electrical characteristics such as channel mobility, and a method for manufacturing the same. A semiconductor device includes a substrate made of silicon carbide and having an off-angle of greater than or equal to 50° and less than or equal to 65° with respect to a surface orientation of {0001}, a p-type layer serving as a semiconductor layer, and an oxide film serving as an insulating film. The p-type layer is formed on the substrate and is made of silicon carbide. The oxide film is formed to contact with a surface of the p-type layer. A maximum value of the concentration of nitrogen atoms in a region within 10 nm of an interface between the semiconductor layer and the insulating film (interface between a channel region and the oxide film) is greater than or equal to 1×10 | 08-04-2011 |
| 20110227096 | SEMICONDUCTOR DEVICE - A semiconductor device having a construction capable of achieving suppressed deterioration of electric characteristics in an insulating member is provided. An n | 09-22-2011 |
| 20110260175 | SEMICONDUCTOR DEVICE - A silicon carbide layer is provided on a substrate, has a hexagonal single-crystal structure, and has a surface at which a depletion layer is formed. A protective film is insulative and provided on the silicon carbide layer to directly cover the surface. The surface thus directly covered with the protective film includes a portion having an off angle of not more than 10° relative to the {0-33-8} plane of the silicon carbide layer. This results in reduced leakage current flowing in an interface between the protective film and the semiconductor layer. | 10-27-2011 |
| 20110309376 | METHOD OF CLEANING SILICON CARBIDE SEMICONDUCTOR, SILICON CARBIDE SEMICONDUCTOR, AND SILICON CARBIDE SEMICONDUCTOR DEVICE - A method of cleaning an SiC semiconductor capable of exhibiting an effect of cleaning an SiC semiconductor is provided. An SiC semiconductor and an SiC semiconductor device capable of achieving improved characteristics are provided. The method of cleaning an SiC semiconductor includes the steps of forming an oxide film on a surface of an SiC semiconductor (step S | 12-22-2011 |
