Patent application number | Description | Published |
20090273882 | CAPACITOR AND METHOD FOR FABRICATING THE SAME - A capacitor includes a first electrode, a dielectric layer, and a second electrode. The capacitor also includes a buffer layer formed over at least one of an interface between the first electrode and the dielectric layer and an interface between the dielectric layer and the second electrode, wherein the buffer layer includes a compound of a metal element from electrode materials of one of the first and second electrodes and a metal element from materials included in the dielectric layer. | 11-05-2009 |
20100096609 | PHASE CHANGE MEMORY DEVICE HAVING A LAYERED PHASE CHANGE LAYER COMPOSED OF MULTIPLE PHASE CHANGE MATERIALS AND METHOD FOR MANUFACTURING THE SAME - A phase change memory device that has a layered phase change layer composed of multiple phase change materials is presented. The device includes a semiconductor substrate, an interlayer dielectric layer, a high-temperature crystallization phase change, a low-temperature crystallization phase change layer, and an upper electrode. The interlayer dielectric layer formed on the semiconductor substrate and the high-temperature crystallization phase change layer is formed on the interlayer dielectric layer. The low-temperature crystallization phase change layer is formed over the high-temperature crystallization phase change layer. The upper electrode is formed over the low-temperature crystallization phase change layer. An optional diffusion barrier may be interposed between the two phase change layers. | 04-22-2010 |
20110073925 | SEMICONDUCTOR DEVICE WITH BURIED BIT LINES INTERCONNECTED TO ONE-SIDE-CONTACT AND FABRICATION METHOD THEREOF - A semiconductor device with reduced resistance of a buried bit line, and a method for fabricating the same. The method for fabricating a semiconductor device includes etching a semiconductor substrate to form a plurality of active regions which are separated from one another by trenches formed in between, forming a side contact on a sidewall of each active region, and forming metal bit lines, each filling a portion of a respective trench and connected to the side contact. | 03-31-2011 |
20110128667 | SEMICONDUCTOR DEVICE INCLUDING CARBON-CONTAINING ELECTRODE AND METHOD FOR FABRICATING THE SAME - In a semiconductor device including a carbon-containing electrode and a method for fabricating the same, an electrode has a high work function due to a carbon-containing TiN layer contained therein. It is possible to provide a dielectric layer having a high permittivity and thus to reduce the leakage current by forming an electrode having a high work function. Also, sufficient capacitance of a capacitor can be secured by employing an electrode having a high work function and a dielectric layer having a high permittivity. | 06-02-2011 |
20110128668 | ELECTRODE OF SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING CAPACITOR - An electrode of a semiconductor device includes a TiCN layer and a TiN layer. A method for fabricating an electrode of a semiconductor device includes preparing a substrate, forming a TiCN layer, and forming a TiN layer. | 06-02-2011 |
20120146196 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer. | 06-14-2012 |
20120153406 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes forming a gate dielectric layer over a substrate, forming a dipole capping layer over the gate dielectric layer, stacking a metal gate layer and a polysilicon layer over the dipole capping layer, and forming a gate pattern by etching the polysilicon layer, the metal gate layer, the dipole capping layer, and the gate dielectric layer. | 06-21-2012 |
20120217619 | SEMICONDUCTOR DEVICE WITH TRIANGLE PRISM PILLAR AND METHOD FOR MANUFACTURING THE SAME - A semiconductor device includes a triangle prism pillar having a first, a second, and a third sidewall surface, a bit line contacted with the first sidewall surface of the pillar, and a word line adjacent to the second sidewall surface of the pillar over the bit line. | 08-30-2012 |
20120273921 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a dielectric layer, where the dielectric layer includes a metal oxide layer, a metal nitride carbide layer including hydrogen therein, and a reduction prevention layer inserted between the metal nitride carbide layer and the dielectric layer. | 11-01-2012 |
20130105901 | SEMICONDUCTOR DEVICE WITH METAL GATE ELECTRODE AND HIGH-K DIELECTRIC MATERIAL AND METHOD FOR FABRICATING THE SAME | 05-02-2013 |
20130171797 | METHOD FOR FORMING MULTI-COMPONENT LAYER, METHOD FOR FORMING MULTI-COMPONENT DIELECTRIC LAYER AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method of forming a multi-component dielectric layer on the surface of a substrate by atomic layer deposition includes injecting a cocktail source of a plurality of sources at least having a cyclopentadienyl ligand, wherein the cocktail source is adsorbed on a surface of a substrate by injecting the cocktail source, performing a first purge process to remove a non-adsorbed portion of the cocktail source, injecting a reactant to react with the adsorbed cocktail source, wherein a multi-component layer is formed by the reaction between the reactant and the absorbed cocktail source, and performing a second purge process to remove reaction byproducts and an unreacted portion of the reactant. | 07-04-2013 |
20130244394 | METHOD FOR FABRICATING CAPACITOR WITH HIGH ASPECT RATIO - A method for fabricating a capacitor includes: forming a first silicon layer over a semiconductor substrate, where the first silicon layer is doped with a dopant; forming an undoped second silicon layer over the first silicon layer; forming an opening by etching the second silicon layer and the first silicon layer; forming a storage node in the opening; and removing the first silicon layer and the second silicon layer. | 09-19-2013 |
20130277636 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a variable resistance memory device includes forming a first electrode, forming a first metal oxide layer which satisfies chemical stoichiometry over the first electrode, forming a second metal oxide layer which is lower in oxygen content than the first metal oxide layer by reducing a part of the first metal oxide layer, and forming a second electrode over the second metal oxide layer. | 10-24-2013 |
20140242772 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A semiconductor device includes a dielectric layer in which zirconium, hafnium, and a IV group element are mixed. A method for fabricating a capacitor includes forming a bottom electrode, forming the dielectric layer and forming a top electrode over the dielectric layer. | 08-28-2014 |
Patent application number | Description | Published |
20080272490 | Semiconductor device including ruthenium electrode and method for fabricating the same - A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug formed on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug. | 11-06-2008 |
20090002917 | CAPACITOR IN SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A capacitor includes a lower electrode, a dielectric layer over the lower electrode, and an upper electrode having a stack structure including a ruthenium-containing layer and a tungsten-containing layer over the dielectric layer. | 01-01-2009 |
20090004808 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a capacitor includes forming a sacrificial layer having a plurality of trenches on an upper portion of a substrate, forming storage nodes in the trenches, exposing upper portions of the storage nodes by removing a portion of the sacrificial layer, forming supporters to support the exposed upper portions of the storage nodes, removing the sacrificial layer under the supporters, and removing the supporters. | 01-01-2009 |
20090008743 | CAPACITOR WITH PILLAR TYPE STORAGE NODE AND METHOD FOR FABRICATING THE SAME - A capacitor includes a pillar-type storage node, a supporter filling an inner empty crevice of the storage node, a dielectric layer over the storage node, and a plate node over the dielectric layer. | 01-08-2009 |
20090061587 | METHOD FOR FABRICATING CAPACITOR IN SEMICONDUCTOR DEVICE - A method for fabricating a capacitor includes providing a substrate having a capacitor region is employed, forming a first Ru | 03-05-2009 |
20100276804 | SEMICONDUCTOR DEVICE INCLUDING RUTHENIUM ELECTRODE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug fainted on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug. | 11-04-2010 |
20110169134 | CAPACITOR WITH PILLAR TYPE STORAGE NODE AND METHOD FOR FABRICATING THE SAME - A capacitor includes a pillar-type storage node, a supporter disposed entirely within an inner empty crevice of the storage node, a conductive capping layer over the supporter and contacting the storage node so as to seal an entrance to the inner empty crevice, a dielectric layer over the storage node, and a plate node over the dielectric layer. | 07-14-2011 |
20110171807 | METHOD FOR FABRICATING CAPACITOR - A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. An upper portion of the isolation layer is etched to expose upper outer walls of the storage nodes. A sacrificial pattern is formed over the isolation layer to enclose the upper outer walls of the storage nodes. The isolation layer in the peripheral region is etched to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed. | 07-14-2011 |
20110171808 | METHOD FOR FABRICATING A CAPACITOR - A method for fabricating a capacitor includes forming an isolation layer over a cell region and a peripheral region of a substrate. The isolation layer forms a plurality of open regions in the cell region. Storage nodes are formed on surfaces of the open regions. A sacrificial pattern is formed over the isolation layer and covers the cell region. The isolation layer is etched in the peripheral region to expose side portions of the resulting structure obtained after forming the sacrificial pattern in the cell region. With the sacrificial pattern supporting the storage nodes, the isolation layer in the cell region is removed. The sacrificial pattern is then removed. | 07-14-2011 |
Patent application number | Description | Published |
20090261454 | CAPACITOR IN SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A capacitor includes a bottom electrode, a dielectric layer and a top electrode over a substrate. A Ru | 10-22-2009 |
20090263967 | Method of forming noble metal layer using ozone reaction gas - A noble metal layer is formed using ozone (O | 10-22-2009 |
20100012989 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device, and a method of fabricating the semiconductor device, which is able to prevent a leaning phenomenon from occurring between the adjacent storage nodes. The method includes forming a plurality of multi-layered pillar type storage nodes each of which is buried in a plurality of mold layers, wherein the uppermost layers of the multi-layered pillar type storage nodes are fixed by a support layer, etching a portion of the support layer to form an opening, and supplying an etch solution through the opening to remove the multiple mold layers. A process of depositing and etching the mold layer by performing the process 2 or more times to form the multi-layered pillar type storage node. Thus, the desired capacitance is sufficiently secured and the leaning phenomenon is avoided between adjacent storage nodes. | 01-21-2010 |
20100046138 | ELECTRODE IN SEMICONDUCTOR DEVICE, CAPACITOR AND METHOD OF FABRICATING THE SAME - A semiconductor device and a method of fabricating the same include an electrode having a nickel layer with impurities. The electrode having a nickel layer with impurities can be a gate electrode or a capacitor electrode. The electrode having a nickel layer with impurities may include a combination of a pure nickel layer and a nickel layer with impurities. | 02-25-2010 |
20120147519 | ELECTRODE IN SEMICONDUCTOR DEVICE, CAPACITOR AND METHOD OF FABRICATING THE SAME - A semiconductor device and a method of fabricating the same include an electrode having a nickel layer with impurities. The electrode having a nickel layer with impurities can be a gate electrode or a capacitor electrode. The electrode having a nickel layer with impurities may include a combination of a pure nickel layer and a nickel layer with impurities. | 06-14-2012 |
20130022744 | METHOD OF FORMING NOBLE METAL LAYER USING OZONE REACTION GAS - A noble metal layer is formed using ozone (O | 01-24-2013 |
20140103283 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME - Disclosed herein are a variable resistance memory device and a method of fabricating the same. The variable resistance memory device may include a first electrode; a second electrode; and a variable resistance layer configured to be interposed between the first electrode and the second electrode, wherein the variable resistance layer includes a Si-added metal oxide. | 04-17-2014 |
20140170830 | VARIABLE RESISTANCE MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a variable resistance memory device includes forming an oxygen-deficient first metal oxide layer over a first electrode, forming an oxygen-rich second metal oxide layer over the first metal oxide layer, treating the first and second metal oxide layers with hydrogen-containing plasma, forming an oxygen-rich third metal oxide layer, and forming a second electrode over the third metal oxide layer. | 06-19-2014 |