Patent application number | Description | Published |
20090113156 | MANAGEMENT METHOD OF PERFORMANCE HISTORY AND A MANAGEMENT SYSTEM OF PERFORMANCE HISTORY - A performance history management method and system are disclosed, in which the time-series performance history such as a volume included in a storage device is managed as one time-series performance history at the time of data rearrangement or device change. The data-oriented performance history providing the logical place of storage of the data stored in the volume is generated using the storage performance monitor program based on the rearrangement history information providing the information on the history of transfer of the data stored in the rearrangement history table and the volume of the storage device by the storage structure information acquisition program, the storage structure information stored in the storage structure information table and the performance history of each volume stored in the storage performance history table by the storage performance information acquisition program. The performance history can be displayed or the performance change detected to display an alert. | 04-30-2009 |
20090282420 | APPLICATION LINKAGE CONTROL APPARATUS AND APPLICATION LINKAGE CONTROL METHOD - When a message is transmitted from a storing application of a process requesting server, a message queuing server stores the message in a queue. When storing the message in the queue, the message queuing server transmits information regarding this message to an extracting application of a process performing server, thereby controlling a linkage operation between the storing application of the process requesting server and the extracting application of the process performing server. | 11-12-2009 |
20090292891 | MEMORY-MIRRORING CONTROL APPARATUS AND MEMORY-MIRRORING CONTROL METHOD - When an update instruction for updating task data stored in a memory is transmitted through a transaction process performed by an application server, an active node apparatus generates, based on the update instruction, an update log indicating update contents of the task data stored in the memory, and then distributes, in a multicast manner, the generated update log to other standby node apparatuses each with a memory. With this, mirroring among the plurality of memories is controlled. | 11-26-2009 |
20120110263 | MANAGEMENT METHOD OF PERFORMANCE HISTORY AND A MANAGEMENT SYSTEM OF PERFORMANCE HISTORY - A performance history management method and system are disclosed, in which the time-series performance history such as a volume included in a storage device is managed as one time-series performance history at the time of data rearrangement or device change. The data-oriented performance history providing the logical place of storage of the data stored in the volume is generated using the storage performance monitor program based on the rearrangement history information providing the information on the history of transfer of the data stored in the rearrangement history table and the volume of the storage device by the storage structure information acquisition program, the storage structure information stored in the storage structure information table and the performance history of each volume stored in the storage performance history table by the storage performance information acquisition program. The performance history can be displayed or the performance change detected to display an alert. | 05-03-2012 |
20120324187 | MEMORY-MIRRORING CONTROL APPARATUS AND MEMORY-MIRRORING CONTROL METHOD - When an update instruction for updating task data stored in a memory is transmitted through a transaction process performed by an application server, an active node apparatus generates, based on the update instruction, an update log indicating update contents of the task data stored in the memory, and then distributes, in a multicast manner, the generated update log to other standby node apparatuses each with a memory. With this, mirroring among the plurality of memories is controlled. | 12-20-2012 |
Patent application number | Description | Published |
20080203562 | Method for designing semiconductor device and semiconductor device - A method for designing a semiconductor device and a semiconductor device of the present invention permits the achievement of a predetermined pattern area ratio while power supply lines are reinforced by connecting a dummy metal line, which is formed in an unoccupied region of a wiring layer for the purpose of achieving the predetermined area ratio, at its two or more points with a power supply line for VDD or VSS. | 08-28-2008 |
20090020784 | METHOD FOR DESIGNING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE - A method for designing a semiconductor device and a semiconductor device of the present invention permits the achievement of a predetermined pattern area ratio while power supply lines are reinforced by connecting a dummy metal line, which is formed in an unoccupied region of a wiring layer for the purpose of achieving the predetermined area ratio, at its two or more points with a power supply line for VDD or VSS. | 01-22-2009 |
20090193374 | METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, DESIGNING APPARATUS, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - As a method for considering the adverse influence of the stresses caused form the pad, two sorts of methods are provided. As one method, while delay variation values of cells caused by an adverse influence of stresses are calculated, the calculated delay variation values are applied to the cells so as to perform a timing analysis, and the like by considering the adverse influence of the stresses. Then, in order that a flip chip type LSI is designed by employing a result of the above-described analysis in such a manner that the adverse influence of the stresses applied from the pad is not given to vias, wiring lines, and cells located under the pad, such a physical structure that no via is arranged under the pad is employed. | 07-30-2009 |
Patent application number | Description | Published |
20080230030 | INTAKE DEVICE FOR MOTORCYCLE - A motorcycle includes an engine having a substantially vertical cylinder assembly and disposed in a front half of a vehicle body frame, an inverted type rear cushion unit disposed behind the engine in substantially vertical posture, an air cleaner disposed behind the rear cushion unit and below a rider's seat, and an intake air passage connecting air an intake port formed in a rear portion of the cylinder assembly and the air cleaner each other. The intake air passage, i.e., connecting pipe, is arranged so as to be overlapped with an upper portion of the rear cushion unit in a side view of the motorcycle. A cross section shape of the connecting pipe is a vertically long shape in which its longitudinal size is greater than its lateral size. | 09-25-2008 |
20080230037 | FUEL SUPPLY DEVICE OF MOTORCYCLE - A straddle type motorcycle includes a frame, an engine mounted on the frame and having a substantially vertical cylinder assembly and an intake air passage extended backward from a rear surface of the cylinder assembly, a fuel tank disposed above the cylinder assembly, and a fuel supply device. The fuel supply device includes a fuel pump disposed at a rear portion of the fuel tank, the fuel pump being overlapped with the cylinder assembly in a longitudinal direction of the motorcycle in a side view of the motorcycle, a fuel injector installed on the intake air passage, and a fuel hose connecting the fuel injector with the fuel pump. | 09-25-2008 |
20150076125 | Laser Irradiation Device, Laser Irradiation System, and Method for Removing Coating or Adhering Matter - In order to provide a laser irradiation system, a method for removing a coating, and a laser irradiation apparatus capable of efficiently removing a coating on a surface of a structure and recovering the removed substance using suction, a laser head ( | 03-19-2015 |
Patent application number | Description | Published |
20130198230 | INFORMATION PROCESSING APPARATUS, DISTRIBUTED PROCESSING SYSTEM, AND DISTRIBUTED PROCESSING METHOD - An information processing apparatus includes a receiving unit that receives an access request for data from one of a plurality of information processing apparatuses in a distributed processing system in which the information processing apparatuses execute a process in a distributed manner, a query issuing unit that issues, when the access request for the data is received by the receiving unit, a query to each of the information processing apparatuses as to whether the data is stored in a page cache managed by an operating system on each of the information processing apparatuses, and a responding unit that makes a response to the access request, the response specifying, as an access destination, an information processing apparatus that has responded to the query issued by the query issuing unit. | 08-01-2013 |
20130198460 | INFORMATION PROCESSING DEVICE, MEMORY MANAGEMENT METHOD, AND COMPUTER-READABLE RECORDING MEDIUM - An information processing device includes a memory and a processor coupled to the memory, wherein the processor executes a process comprising selecting data included in a same file as deletion target data from the memory when deleting the data cached in the memory at the caching from the memory and deleting the deletion target data and the data selected at the selecting, from the memory. | 08-01-2013 |
20140188833 | INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING TERMINAL, RECORDING MEDIUM STORING INFORMATION SEARCH PROGRAM, AND INFORMATION SEARCH METHOD - An information processing device having any of hash values associated with a hash space based on distribution hash information. The device acquires access information to an information processing device as a target, the access information being transmitted from another information processing device on the basis of first distribution hash information using the hash value in the hash space between first devices belonging to one of groups divided according to a sequence in terms of the magnitudes of the hash values associated with the hash space, stores second distribution hash information using the hash value in the hash space pertaining to a second device belonging to the group to which the first device belongs, searches second distribution hash information for a second device corresponding to the hash value generated from the access information, and transmits access information to the retrieved second device by the searching. | 07-03-2014 |