Patent application number | Description | Published |
20080265334 | SEMICONDUCTOR DEVICE CAPABLE OF AVOIDING LATCHUP BREAKDOWN RESULTING FROM NEGATIVE VARIATION OF FLOATING OFFSET VOLTAGE - A semiconductor device is provided which is capable of avoiding malfunction and latchup breakdown resulting from negative variation of high-voltage-side floating offset voltage (VS). In the upper surface of an n-type impurity region, a p | 10-30-2008 |
20080272440 | SEMICONDUCTOR DEVICE CAPABLE OF AVOIDING LATCHUP BREAKDOWN RESULTING FROM NEGATIVE VARIATION OF FLOATING OFFSET VOLTAGE - A semiconductor device is provided which is capable of avoiding malfunction and latchup breakdown resulting from negative variation of high-voltage-side floating offset voltage (VS). In the upper surface of an n-type impurity region, a p | 11-06-2008 |
20090096091 | SEMICONDUCTOR DEVICE MANUFACTURING APPARATUS, SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE - A semiconductor device manufacturing apparatus is provided with a drawing pattern printing part having a print head which injects a conductive solvent, an insulative solvent and an interface treatment solution. The print head is formed in such a way that desired circuit drawing pattern can be printed on a wafer based on information on the drawing pattern from a wafer testing part, information on the wafer from a storage part and coordinate information from a chip coordinate recognition part. In a semiconductor device manufacturing method according to the present invention, a semiconductor device is manufactured by using the semiconductor device manufacturing apparatus in such a manner that desired circuits are formed through printing process. In the semiconductor device, pad electrodes and so on are formed in such a way that trimming process can be conducted by printing circuit drawing patterns. | 04-16-2009 |
20090256234 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A semiconductor device is configured that a high-withstand voltage semiconductor device and logic circuits are integrated on a single chip and that a high-withstand voltage high-potential island including the high-potential-side logic circuit is separated using multiple partition walls enclosing therearound. The semiconductor device is provided with a multi-trench separation region having a level shift wire region that is used to connect the high-potential-side logic circuit to the high-potential-side electrode of the high-withstand voltage semiconductor device. | 10-15-2009 |
20110254049 | SEMICONDUCTOR DEVICE - A semiconductor device manufacturing apparatus is provided with a drawing pattern printing part having a print head which injects a conductive solvent, an insulative solvent and an interface treatment solution. The print head is formed in such a way that desired circuit drawing pattern can be printed on a wafer based on information on the drawing pattern from a wafer testing part, information on the wafer from a storage part and coordinate information from a chip coordinate recognition part. In a semiconductor device manufacturing method according to the present invention, a semiconductor device is manufactured by using the semiconductor device manufacturing apparatus in such a manner that desired circuits are formed through printing process. In the semiconductor device, pad electrodes and so on are formed in such a way that trimming process can be conducted by printing circuit drawing patterns. | 10-20-2011 |
20110316115 | POWER SEMICONDUCTOR DEVICE - A power semiconductor device comprises: a high-voltage side switching element and a low-voltage side switching element which are totem-pole-connected in that order from a high-voltage side between a high-voltage side potential and a low-voltage side potential; a high-voltage side drive circuit that drives the high-voltage side switching element; a low-voltage side drive circuit that drives the low-voltage side switching element; a capacitor which has a first end connected to a connection point between the high-voltage side switching element and the low-voltage side switching element and a second end connected to a power supply terminal of the high-voltage side drive circuit and supplies a drive voltage to the high-voltage side drive circuit; and a diode which has an anode connected to a power supply and a cathode connected to the second end of the capacitor and supplies a current from the power supply to the second end of the capacitor, wherein the diode includes a P-type semiconductor substrate, an N-type cathode region on a surface of the P-type semiconductor substrate, a P-type anode region in the N-type cathode region, a P-type contact region and an N-type contact region in the P-type anode region, a cathode electrode connected to the N-type cathode region, and an anode electrode connected to the P-type contact region and the N-type contact region. | 12-29-2011 |
20130056791 | SEMICONDUCTOR DEVICE - A semiconductor device manufacturing apparatus is provided with a drawing pattern printing part having a print head which injects a conductive solvent, an insulative solvent and an interface treatment solution. The print head is formed in such a way that desired circuit drawing pattern can be printed on a wafer based on information on the drawing pattern from a wafer testing part, information on the wafer from a storage part and coordinate information from a chip coordinate recognition part. In a semiconductor device manufacturing method according to the present invention, a semiconductor device is manufactured by using the semiconductor device manufacturing apparatus in such a manner that desired circuits are formed through printing process. In the semiconductor device, pad electrodes and so on are formed in such a way that trimming process can be conducted by printing circuit drawing patterns. | 03-07-2013 |
20130182595 | ANALOG FRONT-END CIRCUIT FOR MEASUREMENT - An analog front-end circuit for measurement used as an interface between a sensor and a control device includes: an isolated part including at least an AD conversion circuit configured to serve as an interface to the sensor; a non-isolated part including at least a control circuit configured to serve as an interface to the control device; and an isolated communication unit configured to perform isolated half-duplex communication between the isolated part and the non-isolated part. The control circuit is configured to transmit an AD conversion instruction to the AD conversion circuit after providing setting for measurement to the isolated part via the isolated communication unit, obtain a result of AD conversion by the AD conversion circuit from the isolated part via the isolated communication unit, and transfer the obtained AD conversion result to the control device. | 07-18-2013 |
20130221439 | SOI WAFER AND METHOD OF MANUFACTURING THE SAME - An SOI wafer according to the present invention includes a support substrate and an insulating layer formed on the support substrate, a predetermined cavity pattern being formed on one of main surfaces of the support substrate on which the insulating layer is provided, further includes an active semiconductor layer formed on the insulating layer with the cavity pattern being closed, the active semiconductor layer not being formed in an outer peripheral portion of the support substrate, and further includes a plurality of superposition mark patterns formed in the outer peripheral portion on the one of the main surfaces of the support substrate for specifying a position of the cavity pattern. | 08-29-2013 |
20150061070 | SEMICONDUCTOR DEVICE - A first isolation trench insulates and separates a low-voltage region, a high-voltage region, and a connection region of the semiconductor layer from each other. A low-potential signal processing circuit is in the low-voltage region, and operates at a lower potential. A high-potential signal processing circuit is in the high-voltage region, and operates at a higher potential. A capacitor is on the connection region and transmits the second alternating current signal from the low-potential signal processing circuit to the high-potential signal processing circuit. The capacitor includes a low-potential electrode connected to the low-potential signal processing circuit, and a high-potential electrode connected to the high-potential signal processing circuit. First wiring layers of the low-potential electrode and second wiring layers of the high-potential electrode are capacitively coupled. Side wall surfaces of the first wiring layers and those of the second wiring layers are opposed to each other. | 03-05-2015 |