Patent application number | Description | Published |
20080202661 | Method of manufacturing wiring substrate and method of manufacturing electronic component device - In a method of manufacturing a wiring substrate of the present invention, first, a structure in which an underlying layer is arranged in a wiring forming area of a temporary substrate and a peelable multi-layer metal foil that is larger in size than the underlying layer is arranged on the underlying layer and is adhered partially to an outer peripheral portion of the wiring forming area of the temporary substrate, and the peelable multi-layer metal foil is constructed by temporary adhering a first metal foil and a second metal foil with peelable. Then, a built-up wiring layer is formed on the peelable multi-layer metal foil, and the peelable multi-layer metal foil is separated from the temporary substrate by cutting a portion of such a structure that the underlying layer, the peelable multi-layer metal foil, and the built-up wiring layer are formed on the temporary substrate, the portion corresponding to a peripheral portion the underlying layer, whereby a wiring member in which the built-up wiring layer is formed on the peelable multi-layer metal foil is obtained. | 08-28-2008 |
20100065322 | WIRING BOARD AND METHOD OF MANUFACTURING THE SAME - A wiring board includes a pad exposed from an opening portion of an outermost insulating layer. The pad includes: a first metal layer a surface of which is exposed from the wiring board; a second metal layer provided on the first metal layer and formed of a material effective in preventing a metal contained in a via inside the board from diffusing into the first metal layer; and a third metal layer provided between the second metal layer and the via, and formed of a material harder to be oxidized than that of the second metal layer. The thickness of the third metal layer is relatively thick, and is preferably selected to be three times or greater than a thickness of the second metal layer. A side surface of the third metal layer and a surface of the third metal layer to which the via is to be connected are roughed. | 03-18-2010 |
20110169164 | WIRING SUBSTRATE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE - A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess. | 07-14-2011 |
20110289770 | APPARATUS FOR AND METHOD OF MANUFACTURING TEMPORARY SUBSTRATE - An apparatus for manufacturing a temporary substrate includes a jig having a table, a holding guide for positioning constituent members of the temporary substrate, a holding unit for holding the laminated constituent members, and a heater unit for performing a temporary bonding on the laminated constituent members, and further includes a drive mechanism for moving each member constituting the jig between a standby position and an in-use position. The holding guide has a plurality of step portions formed in such a manner that peripheries of the step portions define areas corresponding to outer sizes of the respective constituent members when the holding guide is moved to the in-use position. The temporary substrate has as the constituent members, a prepreg, inner metal foils respectively stacked on both surfaces of the prepreg and each having a smaller outer size than the prepreg, and outer metal foils respectively stacked on the inner metal foils and each having a larger outer size than the prepreg. | 12-01-2011 |
20120175153 | WIRING SUBSTRATE AND MANUFACTURING METHOD THEREOF - A wiring substrate includes plural insulating layers including an outermost insulating layer; and plural wiring layers which are alternately laminated between the insulating layers and include outermost wiring layers exposed from the outermost insulating layer and through wirings having electrode pads on end portions of the through wirings and penetrating through the outermost insulating layer, wherein the electrode pads of the through wirings are exposed from the outermost insulating layer, and a part of the outermost wiring layers overlaps the end portions of the through wirings and is connected to the through wirings. | 07-12-2012 |
20130075145 | WIRING SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A wiring substrate includes an insulating layer, a connection pad buried in the insulating layer in a state that an upper surface of the connection pad is exposed from an upper surface of the insulating layer and a lower surface and at least a part of a side surface of the connection pad contact the insulating layer, and a concave level difference portion formed in the insulating layer around an outer periphery part of the connection pad, wherein an upper surface of the connection pad and an upper surface of the insulating layer are arranged at a same height. | 03-28-2013 |
20130134127 | WIRING BOARD AND METHOD OF FABRICATING THE SAME - A wiring board includes an electrode pad having a first surface and a second surface located on an opposite side from the first surface, a conductor pattern connected to the first surface of the electrode pad, and an insulator layer embedded with the electrode pad and the conductor pattern. The insulator layer covers an outer peripheral portion of the second surface of the electrode pad. | 05-30-2013 |
20130140692 | WIRING SUBSTRATE, MANUFACTURING METHOD OF WIRING SUBSTRATE, AND SEMICONDUCTOR PACKAGE INCLUDING WIRING SUBSTRATE - A wiring substrate includes an insulating layer having a first surface on which a projecting part is formed, and an electrode pad being formed on the projecting part and including a first electrode pad surface and a second electrode pad surface on a side opposite to the first electrode pad surface. The first electrode pad surface is exposed from the projecting part of the insulating layer. The second electrode pad surface is covered by the insulating layer. A cross-section of the projecting part is a tapered shape. One side of the cross-section toward the first electrode pad surface is narrower than another side of the cross-section toward the first surface of the insulating layer. | 06-06-2013 |
20130143062 | METHOD AND SUPPORT MEMBER FOR MANUFACTURING WIRING SUBSTRATE, AND STRUCTURE MEMBER FOR WIRING SUBSTRATE - A wiring substrate manufacturing method includes forming a layered configuration including a first metal layer, a peeling layer, and a second metal layer, removing an edge part of the layered configuration, so that the first metal layer is smaller than the second metal layer from a plan view, forming a support body by adhering the first metal layer to a base member and adhering the base member to a process part, the process part being formed by the removing of the edge part, forming a wiring substrate on the second metal layer, removing a part of the support body and a part of the wiring substrate that are superposed with respect to the process part from a plan view, and separating the second metal layer and the wiring substrate from the support body after the removing of the parts of the support body and the wiring substrate. | 06-06-2013 |
20130269185 | WIRING SUBSTRATE, MANUFACTURING METHOD THEREOF, AND SEMICONDUCTOR PACKAGE - A disclosed wiring substrate includes an insulating layer, a recess formed on a surface of the insulating layer, and an alignment mark formed inside of the recess, wherein a face of the alignment mark is roughened, recessed from the surface of the insulating layer, and exposed from the recess. | 10-17-2013 |
20130314886 | WIRING BOARD AND MOUNTING STRUCTURE - A wiring board includes an insulating layer; a connection part provided on a surface of the insulating layer, the connection part including a first plating layer including a flat surface and a curved surface continuous with the flat surface, wherein the flat surface and the curved surface are exposed on the insulating layer, and an end portion of the curved surface is in contact with the surface of the insulating layer; and a second plating layer formed on an interior surface of the first plating layer so as to be coated with the first plating layer; and a via formed in the insulating layer so as to be connected to the second plating layer. | 11-28-2013 |
20140021625 | WIRING SUBSTRATE, METHOD FOR MANUFACTURING THE WIRING SUBSTRATE, AND SEMICONDUCTOR PACKAGE - A wiring substrate includes an insulating layer including a reinforcement member and having a first surface and a second surface positioned on an opposite side of the first surface, an electrode pad exposed from the first surface, a layered body including first insulating layers and being formed on the second surface, the first insulating layers having a first insulating material as a main component, another layered body including second insulating layers and being formed on the layered body, the second insulating layers having a second insulating material as a main component, and another electrode pad exposed from a surface of the another layered body that is opposite to the layered body. The number of the first insulating layers is equal to that of the second insulating layers. The first insulating layers have a thermal expansion coefficient that is greater than that of the second insulating layers. | 01-23-2014 |