Patent application number | Description | Published |
20110303888 | NONVOLATILE MEMORY DEVICE - According to one embodiment, a nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The memory cell includes a plurality of layers. The plurality of layers includes a carbon-containing memory layer sandwiched between a first electrode film and a second electrode film and a carbon-containing barrier layer provided at least one of between the first electrode film and the memory layer and between the second electrode film and the memory layer. The barrier layer has lower electrical resistivity than the memory layer. | 12-15-2011 |
20110306199 | METHOD FOR MANUFACTURING NONVOLATILE MEMORY DEVICE - According to one embodiment, a method is disclosed for manufacturing a nonvolatile memory device. The nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The method can include forming a first electrode film on the first interconnect. The method can include forming a layer including a plurality of carbon nanotubes dispersed inside an insulator on the first electrode film. At least one carbon nanotube of the plurality of carbon nanotubes is exposed from a surface of the insulator. The method can include forming a second electrode film on the layer. In addition, the method can include forming a second interconnect on the second electrode film. | 12-15-2011 |
20110309318 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a nonvolatile semiconductor memory device includes a first interconnect, a second interconnect and a resistance change layer. The first interconnect extends in a first direction on a major surface of a substrate. The second interconnect extends in a second direction non-parallel to the first direction. The resistance change layer includes a conductive nanomaterial, the resistance change layer located between the first interconnect and the second interconnect and being capable of reversibly changing between a first resistance state and a second resistance state by a voltage applied or a current supplied through the first interconnect and the second interconnect. The resistance change layer has a density varied along a third direction generally perpendicular to the first direction and the second direction. | 12-22-2011 |
20120012805 | NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile memory device includes a first interconnect, a nanomaterial aggregate layer, and a second interconnect. The nanomaterial aggregate layer is provided on the first interconnect. The nanomaterial aggregate layer includes an aggregation of a plurality of micro conductive bodies. The second interconnect is provided on the nanomaterial aggregate layer. At least a lower portion of the nanomaterial aggregate layer is disposed inside the second interconnect as viewed from above. | 01-19-2012 |
20120025159 | NONVOLATILE MEMORY DEVICE - According to one embodiment, a nonvolatile memory device includes a first conductive member and a second conductive member. The first conductive member extends in a first direction. The second conductive member extends in a second direction intersecting the first direction. A portion of the first conductive member connected to the second conductive member protrudes toward the second conductive member. A resistivity of the first conductive member in the first direction is lower than a resistivity of the first conductive member in a third direction of the protrusion of the first conductive member. A resistance value of the first conductive member in the third direction changes. A resistivity of the second conductive member in the second direction is lower than a resistivity of the second conductive member in the third direction. A resistance value of the second conductive member in the third direction changes. | 02-02-2012 |
20120056145 | NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile memory device includes a selection element layer and a nanomaterial aggregate layer. The selection element layer includes silicon. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer includes a plurality of micro conductive bodies and fine particles dispersed in a plurality of gaps between the micro conductive bodies. At least a surface of the fine particle is made of an insulating material other than silicon oxide. | 03-08-2012 |
20120097914 | MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a memory device includes a selection element layer, a nanomaterial aggregate layer, and a fine particle. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer has a plurality of micro conductive bodies aggregated with an interposed gap. The fine particle has at least a surface made of silicon oxynitride. The fine particle is dispersed between the micro conductive bodies in one portion of the nanomaterial aggregate layer piercing the nanomaterial aggregate layer in a thickness direction. | 04-26-2012 |
20120104352 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes a nanomaterial assembly layer, a first electrode layer and a second electrode layer. The nanomaterial assembly layer is formed of an assembly of a plurality of micro conductors via gaps between the micro conductors. The first electrode layer is provided on the nanomaterial assembly layer. The second electrode layer is provided on the first electrode layer. | 05-03-2012 |
20120119179 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes a nanomaterial aggregate layer of a plurality of fine conductors aggregating via gaps and an insulating material disposed in the gaps. | 05-17-2012 |
20120205609 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes a lower electrode layer, a nanomaterial assembly layer, a protective layer and an upper electrode layer. The nanomaterial assembly layer is provided on the lower electrode layer and includes a plurality of fine conductors assembled via a gap. The protective layer is provided on the nanomaterial assembly layer, is conductive, is in contact with the fine conductors, and includes an opening. The upper electrode layer is provided on the protective layer and is in contact with the protective layer. | 08-16-2012 |
20130237008 | METHOD FOR MANUFACTURING NONVOLATILE MEMORY DEVICE - According to one embodiment, a method is disclosed for manufacturing a nonvolatile memory device. The nonvolatile memory device includes a memory cell connected to a first interconnect and a second interconnect. The method can include forming a first electrode film on the first interconnect. The method can include forming a layer including a plurality of carbon nanotubes dispersed inside an insulator on the first electrode film. At least one carbon nanotube of the plurality of carbon nanotubes is exposed from a surface of the insulator. The method can include forming a second electrode film on the layer. In addition, the method can include forming a second interconnect on the second electrode film. | 09-12-2013 |
20130295743 | NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - According to one embodiment, a nonvolatile memory device includes a selection element layer and a nanomaterial aggregate layer. The selection element layer includes silicon. The nanomaterial aggregate layer is stacked on the selection element layer. The nanomaterial aggregate layer includes a plurality of micro conductive bodies and fine particles dispersed in a plurality of gaps between the micro conductive bodies. At least a surface of the fine particle is made of an insulating material other than silicon oxide. | 11-07-2013 |
20140147942 | MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - According to one embodiment, a memory device includes a nanomaterial assembly layer, a first electrode layer and a second electrode layer. The nanomaterial assembly layer is formed of an assembly of a plurality of micro conductors via gaps between the micro conductors. The first electrode layer is provided on the nanomaterial assembly layer. The second electrode layer is provided on the first electrode layer. | 05-29-2014 |