Patent application number | Description | Published |
20100067777 | EVALUATION PATTERN GENERATING METHOD, COMPUTER PROGRAM PRODUCT, AND PATTERN VERIFYING METHOD - An evaluation pattern generating method including dividing a peripheral area of an evaluation target pattern into a plurality of meshes; calculating an image intensity of a circuit pattern when the evaluation target pattern is transferred onto a wafer by a lithography process in a case where a mask function value is given to a predetermined mesh; calculating a mask function value of the mesh so that a cost function of the image intensity, in which an optical image characteristic amount that affects a transfer performance of the evaluation target pattern to the wafer is set to the image intensity, satisfies a predetermined reference when evaluating a lithography performance of the evaluation target pattern; and generating an evaluation pattern corresponding to the mask function value. | 03-18-2010 |
20100261121 | PATTERN FORMING METHOD - To provide a pattern forming method comprising: laminating a resist layer on a substrate; forming a diffraction pattern having an opening opened at a predetermined pitch p for diffracting exposure light on an upper layer side of the resist layer; performing whole image exposure with respect to the diffraction pattern in which a refractive index with respect to the exposure light is n, with diffracted light acquired by irradiation of exposure light having a wavelength λ from above the diffraction pattern, which is then diffracted by the diffraction pattern; and forming a desired pattern on a lower layer side of the resist pattern by using a resist pattern formed by developing the resist layer, wherein the predetermined pitch p, the wavelength λ, and the refractive index n satisfy a condition of p>λ/n. | 10-14-2010 |
20100304279 | MANUFACTURING METHOD OF PHASE SHIFT MASK, CREATING METHOD OF MASK DATA OF PHASE SHIFT MASK, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - A phase shift mask having a plurality of mask patterns or mask data thereof is prepared, and an overlapped focus range in each of the mask patterns in a case where a result of exposure to each of the mask patterns, obtained by an exposure experiment or a lithography simulation, meets a desired dimension is obtained. A digging depth is determined at discretion based on the obtained overlapped focus range. | 12-02-2010 |
20110029937 | PATTERN EVALUATING METHOD, PATTERN GENERATING METHOD, AND COMPUTER PROGRAM PRODUCT - A pattern evaluating method includes generating a proximity pattern that affects a resolution performance of a circuit pattern around a lithography target pattern of the circuit pattern to be formed on the substrate, generating distribution information on a distribution of an influence degree to the resolution performance of the circuit pattern by using the lithography target pattern, calculating the influence degree to the resolution performance of the circuit pattern by the proximity pattern as a score by comparing the distribution information with the proximity pattern, and evaluating whether the proximity pattern is placed at an appropriate position in accordance with the circuit pattern based on the score. | 02-03-2011 |
20110065028 | PATTERN GENERATING METHOD, MANUFACTURING METHOD OF MASK, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - According to the embodiments, each of a main pattern of a mask to be transferred onto a substrate by using a lithography process, a first assist pattern that improves a resolution of an on-substrate pattern obtained by transferring the main pattern onto the substrate, and a second assist pattern that suppresses a transfer property of the first assist pattern onto the substrate is placed as a mask pattern. | 03-17-2011 |
20110209107 | MASK-LAYOUT CREATING METHOD, APPARATUS THEREFOR, AND COMPUTER PROGRAM PRODUCT - According to one embodiment, a design layout highly likely to be a dangerous point in a lithography process is set, a coherence map kernel for generating the mask layout is set with respect to the set design layout, the coherence map is created based on the set coherence map kernel and the set design layout, the auxiliary pattern is extracted from the created coherence map and shaped to generate the mask layout, a cost function COST for evaluating an optimization degree of the mask layout is defined, the generated mask layout is evaluated using the cost function, and at least one of parameters of the coherence map kernel and parameters in extracting and shaping the auxiliary pattern from the coherence map are changed until the mask layout evaluated using the cost function is optimized. | 08-25-2011 |
20120244717 | RESIN REMOVAL METHOD, RESIN REMOVAL APPARATUS, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - According to one embodiment, a resin removal method is provided. In the resin removal method, near-field light is generated in a local area of a pattern concave-convex portion on a pattern master used for imprinting by irradiating the pattern master with ultraviolet light in an ashing gas atmosphere which removes resin attached to the pattern master. Then, the resin is removed from the pattern master by using the ashing gas and the near-field light. | 09-27-2012 |
20130017495 | INTERFERENCE EXPOSURE APPARATUS, INTERFERENCE EXPOSURE METHOD, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICEAANM Kodera; KatsuyoshiAACI KanagawaAACO JPAAGP Kodera; Katsuyoshi Kanagawa JPAANM Tanaka; SatoshiAACI KanagawaAACO JPAAGP Tanaka; Satoshi Kanagawa JP - According to one embodiment, an interference exposure apparatus of the embodiment includes a light path changing section in which a changing element adapted to change a light path direction and a light path length of a plurality of light beams with respect to the plurality of light beams having coherency with respect to each other is arranged substantially axisymmetrically; and an adjusting section for adjusting one part of the light beam entering a substrate by intensity changing or phase changing one part of the light beam corresponding to a pattern shape to form on the substrate. A light beam exit from the light path changing section and the adjusting section is interfered on the substrate to carry out an interference exposure on the substrate. | 01-17-2013 |