Patent application number | Description | Published |
20080293251 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device in which a first hole and a second hole having a lower aspect ratio than the first hole are formed in an insulating film formed on a semiconductor substrate is provided. The method includes: performing a first etching process configured to etch the insulating film; and performing a second etching process configured to etch the insulating film. The second etching process is performed under a condition that deposition rate of a deposited layer formed on a surface of the insulating film is lower than that in the first etching process. | 11-27-2008 |
20090000640 | SURFACE TREATMENT METHOD, ETCHING METHOD, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE - A surface treatment method includes: removing a fluorocarbon-containing reaction product from a surface of a workpiece by oxygen gas plasma processing. The workpiece includes a plurality of layers. The fluorocarbon-containing reaction product is deposited by successively etching the layers of the workpiece. The method further includes after removing the reaction product, removing an oxide-containing reaction product from the surface of the workpiece using hydrogen fluoride gas. | 01-01-2009 |
20150042261 | PHOTOVOLTAIC SYSTEM AND POWER STORAGE DEVICE - According to an aspect of the invention, there is provided a photovoltaic system including: a power generation module including at least one power generation section configured to convert energy of light to electrical power, and a power storage module including a plurality of power storage devices configured to store the electrical power converted by the power generation section. The power generation module and the power storage module are connected in parallel. In the power storage module, the plurality of power storage devices is connected in series. And, number of the power storage devices is larger than number of the power generation sections. | 02-12-2015 |
Patent application number | Description | Published |
20080296825 | SHEET PROCESSING APPARATUS AND IMAGE FORMING APPARATUS - The invention is to provide a miniaturized sheet processing apparatus in that a conveying length a conveying distance need not be increased even though the number of sheets per bundle increases. A glue applying bookbinder that partially glues sheets and performs a pressing process to form a sheet bundle. The glue applying bookbinder includes a processing tray that stacks sheets, a glue applying portion that applies a glue on the sheets on the processing tray, and pressing portions that press the sheets on the processing tray. The glue applying portion is arranged such that the glue applying portion can be moved from a first standby position outside the sheets stacked on the stacking portion to a second standby position, different from the first standby position, outside the sheets through an upper surface of the sheets, and the pressing portions are moved integrally with the glue applying portion. | 12-04-2008 |
20080298929 | SHEET PROCESSING APPARATUS AND IMAGE FORMING APPARATUS HAVING THE SAME - The invention is to stabilize an amount of application of a glue to sheets, to stabilize adhesive force between the sheets, and to further improve the productivity of a glued sheet bundle. A sheet processing apparatus includes a processing tray | 12-04-2008 |
20090008858 | SHEET PROCESSING APPARATUS AND IMAGE FORMING APPARATUS - A sheet processing apparatus comprises that a plurality of sheet processing portions that perform a sheet process on a sheet; and a plurality of conveying paths which transport the sheet to connect to the plurality of sheet processing portions, respectively, wherein while one of the plurality of sheet processing portions executes the sheet process on a preceding sheet or a preceding sheet bundle, a subsequent sheet is conveyed to the conveying path connecting to the other one of the plurality of sheet processing portions and held on standby on the conveying path connecting to the other sheet processing portion. | 01-08-2009 |
Patent application number | Description | Published |
20100097832 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile-semiconductor-memory-device including a cell array having a plurality of MATs (unit-cell-array) disposed in a matrix, the MATs each include a plurality of first lines, a plurality of second lines crossing the first lines, and memory cells being connected between the first and second lines. The device further includes a first and second drive circuit selecting the first and second lines connected to the memory cells of each MAT that are accessed, and driving the selected first and second lines to write or read data. The memory cells form a page by being connected to each first line selected from the MATs. The device also includes a data latch latching the write or the read data in units of pages, where the first and second drive circuit drive the first and second lines multiple times to write or read data for one page in and out of the cell array. | 04-22-2010 |
20110134695 | SEMICONDUCTOR MEMORY DEVICE - Provided is a semiconductor memory device including: multiple bit lines arranged in parallel to one another; multiple sense-amplifier bit lines arranged away from end portions of the bit lines; a fourth sense-amplifier bit line formed with a wire of a first layer arranged below the bit lines; selection transistors with a pair of gate electrodes arranged in a direction normal to the first to sixth bit lines; a first wire arranged below the bit lines and the sense-amplifier bit lines, and having an end portion extending to below the third bit line and connected to the bit line; a third wire formed with a layer of the gate electrode used as a wire, the third wire including a first end portion positioned below the fourth sense-amplifier bit line and connected to the fourth sense-amplifier bit line, and a second end portion positioned below the second sense-amplifier bit line; and a fourth wire formed with a wire of the first layer and arranged between the third wire and the second sense-amplifier bit line to connect the third wire to the second sense-amplifier bit line. | 06-09-2011 |
20110211395 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device, in which interference between adjoining cells can be reduced and an expansion of a chip area can be suppressed, comprising: a memory cell array in which plural memory cells connected to plural word lines and plural bit lines are disposed in a matrix form; sense amplifiers each of which is to be connected to each of the bit lines; a control circuit which controls voltages of the word lines and the bit lines, and programs data into the memory cells or reads data from the memory cells; wherein the plural bit lines include at least a first, a second, a third and a fourth bit lines adjoining to each other, and the sense amplifiers include at least a first and a second sense amplifiers, a first and a fourth selection transistors which are provided between the first and the fourth bit lines and the first sense amplifier, and connect the first and the fourth bit lines to the first sense amplifier; and a second and a third selection transistors which are provided between the second and the third bit lines and the second sense amplifier, and connect the second and the third bit lines to the second sense amplifier. | 09-01-2011 |
20110228583 | SEMICONDUCTOR MEMORY DEVICE - According to one embodiment, a semiconductor memory device includes a memory cell array, a first sense amplifier circuit, and a second sense amplifier circuit. The memory cell array includes a plurality of first memory cell units, a plurality of second memory cell units, a plurality of first interconnects, and a plurality of second interconnects. The first sense amplifier circuit is connected to the plurality of first interconnects. The second sense amplifier circuit is connected to the plurality of second interconnects. Heights of upper surfaces of interconnects are equal. At least one of a width of each of the plurality of second interconnects along a second direction perpendicular to the first direction and a thickness of each of the plurality of second interconnects along a third direction perpendicular to the first direction and the second direction is set smaller than each of the plurality of first interconnects, and the first sense amplifier circuit and the second sense amplifier circuit are disposed to face each other across the memory cell array. | 09-22-2011 |
20120075916 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile-semiconductor-memory-device including a cell array having a plurality of MATs (unit-cell-array) disposed in a matrix, the MATs each include a plurality of first lines, a plurality of second lines crossing the first lines, and memory cells being connected between the first and second lines. The device further includes a first and second drive circuit selecting the first and second lines connected to the memory cells of each MAT that are accessed, and driving the selected first and second lines to write or read data. The memory cells form a page by being connected to each first line selected from the MATs. The device also includes a data latch latching the write or the read data in units of pages, where the first and second drive circuit drive the first and second lines multiple times to write or read data for one page in and out of the cell array. | 03-29-2012 |
Patent application number | Description | Published |
20130161627 | PHOTOELECTRIC CONVERSION APPARATUS, IMAGING APPARATUS USING THE SAME, AND MANUFACTURING METHOD THEREOF - A photoelectric conversion apparatus includes: an active matrix-type TFT array substrate on which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, wherein the photoelectric conversion element connects with a drain electrode via a contact hole opened through a first interlayer insulation film provided above the thin film transistor, wherein a data line and a bias line are connected with the source electrode and the photoelectric conversion element via respective contact holes opened through the second interlayer insulation, and wherein at least a part of the photoelectric conversion element is fixed to have a shape different from a normal pixel between pixels adjacent to each other in an extending direction of the gate line, and an electrical connection between the photoelectric conversion element and the data line is cut off in the transistor of the pixel having the different shape. | 06-27-2013 |
20140291743 | PHOTOELECTRIC CONVERSION APPARATUS, IMAGING APPARATUS USING THE SAME, AND MANUFACTURING METHOD THEREOF - A photoelectric conversion apparatus includes: an active matrix-type TFT array substrate on which photoelectric conversion elements and thin film transistors are arranged in a matrix shape, wherein the photoelectric conversion element connects with a drain electrode via a contact hole opened through a first interlayer insulation film provided above the thin film transistor, wherein a data line and a bias line are connected with the source electrode and the photoelectric conversion element via respective contact holes opened through the second interlayer insulation, and wherein at least a part of the photoelectric conversion element is fixed to have a shape different from a normal pixel between pixels adjacent to each other in an extending direction of the gate line, and an electrical connection between the photoelectric conversion element and the data line is cut off in the transistor of the pixel having the different shape. | 10-02-2014 |
20150015820 | ARRAY SUBSTRATE, METHOD OF DISCONNECTION INSPECTING GATE LEAD WIRE AND SOURCE LEAD WIRE IN THE ARRAY SUBSTRATE, METHOD OF INSPECTING THE ARRAY SUBSTRATE, AND LIQUID CRYSTAL DISPLAY DEVICE - An array substrate has a plurality of gate signal lines, a plurality of source signal lines orthogonal to the plurality of gate signal lines, a plurality of gate-driver mounting terminals, a plurality of source-driver mounting terminals, a plurality of gate-side array inspection terminals connected to the gate signal lines, a plurality of source-side array inspection terminals connected to the source signal lines, a plurality of gate lead wire disconnection inspection circuits connected between the plurality of gate-driver mounting terminals and a common terminal for a gate lead wire disconnection inspection, and a plurality of source lead wire disconnection inspection circuits connected between the plurality of source-driver mounting terminals and a common terminal for a source lead wire disconnection inspection. | 01-15-2015 |
Patent application number | Description | Published |
20100176505 | POWER SEMICONDUCTOR MODULE AND FABRICATION METHOD THEREOF - An elastic printed board is provided so that stress applied by the silicon gel is absorbed by the printed board. Further, the printed board is formed to be so narrow that the stress can escape. On the other hand, the wires on which a high voltage is applied are patterned on respective printed boards. This serves to prevent discharge through the surface of the same printed board serving as a current passage. This design makes it possible to hermetically close the power module, prevent intrusion of moisture or contamination as well as displacement, transformation and cracks of the cover plate. | 07-15-2010 |
20100289148 | SEMICONDUCTOR POWER MODULE - Use of Pb-free solder has become essential due to the environmental problem. A power module is formed by soldering substrates with large areas. It is known that in Sn-3Ag-0.5Cu which hardly creeps and deforms with respect to large deformation followed by warpage of the substrate, life is significantly shortened with respect to the temperature cycle test, and the conventional module structure is in the situation having difficulty in securing high reliability. Thus, the present invention has an object to select compositions from which increase in life can be expected at a low strain rate. In Sn solder, by doping In by 3 to 7% and Ag by 2 to 4.5%, the effect of delaying crack development at a low strain rate is found out, and as a representative composition stable at a high temperature, Sn-3Ag-0.5Cu-5In is selected. Further, for enhancement of reliability, a method for partially coating a solder end portion with a resin is shown. | 11-18-2010 |
20130001805 | POWER SEMICONDUCTOR MODULE - The respective main electrodes of the semiconductor switching elements such as IGBTs, which are respectively mounted on the plurality of insulating boards, are electrically connected to each other via the conductor member. This configuration makes it possible to suppress the occurrence of the resonant voltage due to the junction capacity and the parasitic inductance of each semiconductor switching element. | 01-03-2013 |
Patent application number | Description | Published |
20130158181 | RUBBER COMPOSITION AND MOLDED RUBBER PRODUCTS - To provide a rubber composition capable of sufficiently abrading a sealing lip while sliding it in an initial stage of rotation and sufficiently reducing a running torque, and further capable of securing a sufficient sealing property. The composition includes a first compounding ingredient which is one or more kinds selected from the group consisting of calcium carbonate, magnesium oxide, aluminum oxide and barium sulfate in an amount of 50 to 200 parts by mass based on 100 parts by mass of a rubber component, and a second compounding ingredient which is one or two kinds selected from the group consisting of carbon black and a silica in an amount of more than 0 parts by mass and 50 parts by mass or lower. | 06-20-2013 |
20140064649 | RETAINER FOR BALL BEARING, AND BALL BEARING - A retainer for a ball bearing includes two annular members that face each other in an axial direction thereof. The two annular members include opposed surfaces each having hemispherical pockets that are formed at positions in a circumferential direction of each of the two annular members and configured to receive balls. The opposed surfaces are snap-fitted to each other to couple together the two annular members. The hemispherical pockets each have an inner peripheral surface provided with ball contact and ball non-contact surfaces. The ball contact surface is formed at a central portion in a pocket circumferential direction and at least at a central portion in a pocket axial direction of the inner peripheral surface. The ball non-contact surface includes a recess recessed to an opposite side to a corresponding ball across the ball contact surface and is opened in at least one of pocket axial ends. | 03-06-2014 |
20140133792 | ROLLING BEARING - A rolling contact bearing assembly includes a seal member having a seal lip segment. The seal lip segment includes a waist portion having, as viewed in a cross section, a bent V-shape such that a surface of the seal lip segment on outer side defines a relief recess and also includes a protrusion portion distal to the waist portion and having a tapered shape narrowing towards a free end thereof. The seal member installed in the bearing assembly applies urging force on one of inner and outer raceway rings, against change in degree of interference of the protrusion portion with the raceway ring. The protrusion portion includes such high wear material that rotation of the bearing assembly results in wear of the protrusion portion to cause the protrusion portion to make non-contact status or light contact status of a contact pressure of substantially zero. | 05-15-2014 |
Patent application number | Description | Published |
20100208406 | CIRCUIT PROTECTION DEVICE - There is provided a circuit protection device that increases the possibility of enabling a circuit to be protected. The circuit protection device ( | 08-19-2010 |
20100328832 | Electrical Composite Element - An electric device that functions either as a reverting (resettable) type element or a non-reverting (non-resettable) type element depending on the conditions. Such an element includes a polymer PTC element and a temperature fuse member connected in series thereto, the temperature fuse member placed such that it is under the thermal influence of the polymer PTC element. A melting point of a metal composing the temperature fuse member is at least 5° C. higher than a melting point of a polymer composing the polymer PTC element. | 12-30-2010 |
20110140827 | CIRCUIT PROTECTION DEVICE - There is provided a circuit protection device with even more possibility of protecting a circuit. | 06-16-2011 |
20120120538 | Circuit Protection Device - There is provided a circuit protection device with further improved possibility of protecting the circuit. In the circuit protection device ( | 05-17-2012 |
20130299323 | Contact Structure - The present invention provides a means in which contact between contacts in a “double-break (or double-make) contact structure” occurs in two places in the same state as much as possible. A contact structure includes two fixed members ( | 11-14-2013 |
20150022311 | Protective Device - The present invention provides a protection device which provides a greater degree of freedom in a disposition of the bimetal switch as well as be able to more accurately control an actuation of the bimetal member of the bimetal switch. The protection device characterized in that the device comprises a bimetal switch wherein a first PTC member and a bimetal member are connected electrically in parallel with each other; and a second PTC member; and the bimetal member is disposed to be actuated by tripping of the second PTC member. | 01-22-2015 |
20150035641 | Protection Device - The present invention provides a protection device which comprises a resin base 14, a PTC component 24, a bimetal component 26, an arm 28 and an upper plate 46 which are housed in a resin housing wherein the resin base 14 includes a terminal 12 which is integrated with the resin base by insert molding. The protection device further includes a resin cover 16 which is formed by insert molding so as to cover the PTC component 24, the bimetal component 26, the arm 28 and the upper plate 46 which are superposed in this order over the terminal 12 within a space in the resin base 14. The space in the resin base 14 is substantially closed by the upper plate 46, the resin base 14 and the resin cover 16 are integrally bonded to define the resin housing, the terminal 12 and the arm 28 are is electrically connected in series in a normal state, and in an abnormal state where the bimetal component 26 is activated, the terminal 12 and the arm 28 are electrically cut off, while the terminal 12, the PTC component 24, the bimetal component 26, and the arm 28 are electrically connected in series in this order. | 02-05-2015 |
Patent application number | Description | Published |
20080238959 | Image Recording Apparatus - An image recording apparatus improves the operating efficiency while preventing trouble due to the contact of a recording medium with a discharging surface of a recording head. A distance sensor for detecting the distance of the leading edge of a sheet from a conveying surface is provided upstream from the inkjet head in the conveying direction of the sheet. A gap control unit controls a frame moving mechanism to move the inkjet head up so that a gap between the discharging surface and the conveying surface increases when the distance detected by the distance sensor is above a first distance, and the gap distance may be increased by different amounts depending on the distance detected by the distance sensor. A discharging control unit controls the inkjet head to discharge ink droplets after the gap is increased. | 10-02-2008 |
20110001776 | IMAGE DATA PROCESSING APPARATUS AND LIQUID EJECTION APPARATUS - Quantizing means generates a quantized density and a quantization error component for a target pixel in a plurality of pixels. A subtracter calculates, for the target pixel, a quantization error correction component by subtracting the density of the target pixel contained in preliminary ejection data from the quantization error component output from the quantizing means. An allocator allocates the quantization error correction component calculated by the subtracter to a plurality of the pixels around the target pixel. The quantizing means outputs the quantized density and the quantization error component of the target pixel by performing an addition using the density of the target pixel contained in the image data, the density of the target pixel contained in the preliminary ejection data, and the accumulated diffused error component assigned to the target pixel by the allocator when other pixels are quantized. | 01-06-2011 |
20120194590 | LIQUID-DROPLET EJECTING APPARATUS, METHOD FOR CONTROLLING THE SAME, AND NONVOLATILE STORAGE MEDIUM STORING PROGRAM FOR CONTROLLING THE APPARATUS - A liquid-droplet ejecting apparatus including: a head configured to eject liquid onto a recording medium; a curl-amount calculating section configured to calculate a curl amount of the recording medium on the basis of a location of at least one evaluation region on the recording medium and calculated amount of the liquid and the calculated number of liquid droplets to be ejected for the at least one evaluation region; and a curl suppressing section configured to change the evaluation ejection data for the at least one evaluation region on the basis of the calculated curl amount of the recording medium so as to change the amount of the liquid and/or the number of the liquid droplets to be ejected onto at least the at least one evaluation region on the recording medium to suppress the curl of the recording medium. | 08-02-2012 |
20120274693 | IMAGE RECORDING APPARATUS, METHOD FOR PRODUCING TEST PATTERN IN THE SAME, AND NONTRANSITORY STORAGE MEDIUM STORING PROGRAM - An image recording apparatus, including: a first head for ejecting first liquid for recording; a second head for ejecting second liquid; and a controller. The controller selects, based on the image data, one of waveforms for ejecting the first liquid for each pixel and supplies, to the first-liquid ejection head, a drive signal based on the selected waveform. The controller selects, based on the image data, one of the of waveforms for ejecting the second liquid for each pixel and supplies, to the second-liquid ejection head, a drive signal based on the selected waveform. The controller determines whether recording of a test pattern using the second liquid is required, and when the recording of the test pattern using the second liquid is required, selects the waveform such that the first liquid is not ejected. | 11-01-2012 |
20130033538 | IMAGE RECORDING APPARATUS AND NONTRANSITORY STORAGE MEDIUM STORING PROGRAM - An image recording apparatus, including: a first head for ejecting first liquid; a second head for ejecting second liquid; a second-liquid test-pattern recording command section configured to command recording of a test pattern of the second liquid on the recording medium; and an output controller configured to output recording data to the first bead and/or the second head. When the second-liquid test-pattern recording command section does not command the recording of the test pattern of the second liquid, the output controller outputs recording data representative of an image to be recorded, to the first head and the second head. When the second-liquid test-pattern recording command section commands the recording of the test pattern of the second liquid, the output controller outputs the recording data representative of the test pattern of the second liquid, not to the first head but to the second head. | 02-07-2013 |
20130194589 | IMAGE DATA PROCESSING APPARATUSES, BOUNDARY DETECTION DEVICES, BOUNDARY DETECTION METHODS, AND COMPUTER-READABLE STORAGE MEDIA FOR DETECTING BOUNDARIES IN AN IMAGE - image boundary detection devices and methods include processes. Processes include setting an image recording mode to a second recording mode. First and second recording modes utilize first and second density values, respectively. Second density values are less than corresponding first density values, Processes include reducing first density values to second density values when the second recording mode is set. Processes include setting an image boundary determination threshold to one of a first and second threshold value when a respective one of the first and second recording mode is set. The second threshold value is less than the first threshold value, Processes include calculating density gradient values based on one of the first and second density value when the respective one of the first and second recording mode is set. Processes include determining whether pixels are image boundaries using density gradient values and the image boundary determination threshold. | 08-01-2013 |
Patent application number | Description | Published |
20110151618 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An oxide semiconductor layer with excellent crystallinity is formed to enable manufacture of transistors with excellent electrical characteristics for practical application of a large display device, a high-performance semiconductor device, etc. By first heat treatment, a first oxide semiconductor layer is crystallized. A second oxide semiconductor layer is formed over the first oxide semiconductor layer. By second heat treatment, an oxide semiconductor layer including a crystal region having the c-axis oriented substantially perpendicular to a surface is efficiently formed and oxygen vacancies are efficiently filled. An oxide insulating layer is formed over and in contact with the oxide semiconductor layer. By third heat treatment, oxygen is supplied again to the oxide semiconductor layer. A nitride insulating layer containing hydrogen is formed over the oxide insulating layer. By fourth heat treatment, hydrogen is supplied at least to an interface between the second oxide semiconductor layer and the oxide insulating layer. | 06-23-2011 |
20120001179 | SEMICONDUCTOR DEVICE - It is an object to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. A semiconductor device having a stacked-layer structure of a gate insulating layer; a first gate electrode in contact with one surface of the gate insulating layer; an oxide semiconductor layer in contact with the other surface of the gate insulating layer and overlapping with the first gate electrode; and a source electrode, a drain electrode, and an oxide insulating layer which are in contact with the oxide semiconductor layer is provided, in which the nitrogen concentration of the oxide semiconductor layer is 2×10 | 01-05-2012 |
20120064703 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high. | 03-15-2012 |
20130099231 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×10 | 04-25-2013 |
20130099233 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield to achieve high productivity. In the manufacture of a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are sequentially stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film, the source electrode layer and the drain electrode layer are formed through an etching step and then a step for removing impurities which are generated by the etching step and exist on a surface of the oxide semiconductor film and in the vicinity thereof is performed. | 04-25-2013 |
20130187153 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A highly reliable semiconductor device including a transistor using an oxide semiconductor is provided. In a semiconductor device including a bottom-gate transistor including an oxide semiconductor layer, a first insulating layer is formed in contact with the oxide semiconductor layer, and an oxygen doping treatment is performed thereon, whereby the first insulating layer is made to contain oxygen in excess of the stoichiometric composition. The formation of the second insulating layer over the first insulating layer enables excess oxygen included in the first insulating layer to be supplied efficiently to the oxide semiconductor layer. Accordingly, the highly reliable semiconductor device with stable electric characteristics can be provided. | 07-25-2013 |
20140099752 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An oxide semiconductor layer with excellent crystallinity is formed to enable manufacture of transistors with excellent electrical characteristics for practical application of a large display device, a high-performance semiconductor device, etc. By first heat treatment, a first oxide semiconductor layer is crystallized. A second oxide semiconductor layer is formed over the first oxide semiconductor layer. By second heat treatment, an oxide semiconductor layer including a crystal region having the c-axis oriented substantially perpendicular to a surface is efficiently formed and oxygen vacancies are efficiently filled. An oxide insulating layer is formed over and in contact with the oxide semiconductor layer. By third heat treatment, oxygen is supplied again to the oxide semiconductor layer. A nitride insulating layer containing hydrogen is formed over the oxide insulating layer. By fourth heat treatment, hydrogen is supplied at least to an interface between the second oxide semiconductor layer and the oxide insulating layer. | 04-10-2014 |
20140147969 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - An object is to provide a technique by which a semiconductor device including a high-performance and high-reliable transistor is manufactured. A protective conductive film which protects an oxide semiconductor layer when a wiring layer is formed from a conductive layer is formed between the oxide semiconductor layer and the conductive layer, and an etching process having two steps is performed. In a first etching step, an etching is performed under conditions that the protective conductive film is less etched than the conductive layer and the etching selectivity of the conductive layer to the protective conductive film is high. In a second etching step, etching is performed under conditions that the protective conductive film is more easily etched than the oxide semiconductor layer and the etching selectivity of the protective conductive film to the oxide semiconductor layer is high. | 05-29-2014 |
20140327000 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield to achieve high productivity. In the manufacture of a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are sequentially stacked and a source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film, the source electrode layer and the drain electrode layer are formed through an etching step and then a step for removing impurities which are generated by the etching step and exist on a surface of the oxide semiconductor film and in the vicinity thereof is performed. | 11-06-2014 |
20140332808 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×10 | 11-13-2014 |
Patent application number | Description | Published |
20100130743 | HETEROCYCLE-SUBSTITUTED, N-PHENYL-PHTHALAMIDE DERIVATIVES, RELATED COMPOUNDS AND THEIR USE AS INSECTICIDES - Novel benzenedicarboxamides of the formula (I) wherein X represents hydrogen, halogen atom, nitro, C | 05-27-2010 |
20110009457 | Aminobenzamide Derivatives as Useful Agents for Controlling Animal Parasistes - The invention relates to a composition comprising at least one aminobenzamide compound or a salt thereof for controlling animal parasites, veterinary pharmaceutical compositions comprising at least one aminobenzamide of formula (I) for preventing infection with diseases transmitted through parasites, its use for the preparation of a veterinary pharmaceutical for controlling animal parasites, and a method for preventing infection with diseases transmitted through parasites. | 01-13-2011 |
20120094830 | ANTHRANILIC ACID DIAMIDE DERIVATIVE WITH HETERO-AROMATIC AND HETERO-CYCLIC SUBSTITUENTS - The present invention relates to new insecticides of the formula (I) | 04-19-2012 |
20120214851 | Aminobenzamide Derivatives as Useful Agents for Controlling Animal Parasites - The invention relates to a composition comprising at least one aminobenzamide compound or a salt thereof for controlling animal parasites, veterinary pharmaceutical compositions comprising at least one aminobenzamide of formula (I) for preventing infection with diseases transmitted through parasites, its use for the preparation of a veterinary pharmaceutical for controlling animal parasites, and a method for preventing infection with diseases transmitted through parasites. | 08-23-2012 |
Patent application number | Description | Published |
20100085736 | LIGHTING DEVICE FOR DISPLAY DEVICES, LIQUID CRYSTAL DISPLAY DEVICE, AND LIGHT SOURCE LAMP - A lighting device for display devices preferably used for constituting a backlight of a transmissive or transflective liquid crystal display device includes a light source lamp, and a light-diffusing layer constituted by a diffusing plate or a diffusing sheet, the light source lamp being a light source lamp having a folded portion (curved portion), such as U-shaped tube, and the lighting device for display devices having any of, or a combination of: a configuration in which the folded portion (curved portion) of the light source lamp is covered with a lamp frame; a configuration in which an optical member provided with a light-reducing or light-shielding treatment is used around the folded portion (curved portion) of the light source lamp; a configuration in which the folded portion (curved portion) of the light source lamp is disposed outside an effective display region; a configuration in which the folded portion (curved portion) of the light source lamp is provided with a member for reducing or shielding light; and a configuration in which a reflective member provided with a light-reducing treatment is used around the folded portion (curved portion) of the light source lamp. As a result, at least part of light generated from the curved portion of the light source lamp is reduced or shielded. | 04-08-2010 |
20120243209 | LIGHTING DEVICE FOR DISPLAY DEVICES, LIQUID CRYSTAL DISPLAY DEVICE, AND LIGHT SOURCE LAMP - A lighting device includes a light source lamp, and a light-diffusing layer including a diffusing plate or a diffusing sheet, the light source lamp including a folded portion (curved portion), such as U-shaped tube, and the lighting device for display devices having any of, or a combination of: the folded portion of the light source lamp is covered with a lamp frame; an optical member provided with a light-reducing or light-shielding treatment is around the folded portion of the light source lamp; the folded portion of the light source lamp is outside an effective display region; the folded portion of the light source lamp includes a member reducing or shielding light; and a reflective member with a light-reducing treatment around the folded portion of the light source lamp. As a result, at least part of light generated from the curved portion of the light source lamp is reduced or shielded. | 09-27-2012 |