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Karthikeyan
Karthikeyan Avudaiyappan, Sunnyvale, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100262751 | Memory Control Unit Mapping Physical Address to DRAM Address for a Non-Power-of-Two Number of Memory Ranks Using Lower Order Physical Address Bits - A processor for low rank addressing of processor memory with non-power-of-two ranks. The processor includes cores that receive access requests to the processor memory (e.g., one or more DIMMs). The processor includes a memory controller connected to the core(s) that generates an address to the processor memory. The generating of the address includes identifying select rank bits in the physical address, determining whether the select rank bits map to a rank that is absent, and, when the physical address maps to an absent rank, modifying the physical address to include a modified set of select rank bits that are mapped to one of the ranks present in the processor memory. The modifying of the physical address may include swapping the lower rank bits with a higher order set of bits in the physical address. The memory controller proceeds with PA to DA conversions with the modified physical address. | 10-14-2010 |
| 20110153928 | MEMORY UTILIZATION TRACKING - A hardware memory control unit that includes a register block and hardware logic. The register block includes, for a hardware memory segment, an access count register for storing an access count, a low threshold register for storing a low threshold, and a high threshold register for storing a high threshold. The hardware logic includes functionality to increment the access count stored in the access count register for each memory access to the hardware memory segment performed during a predefined duration of time, and, at the end of the predefined duration of time, perform a response action when the access count stored in the access count register is less than the low threshold stored in the low threshold register, and perform a response action when the access count stored in the access count register is greater than the high threshold stored in the high threshold register. A power saving mode of the hardware memory segment is modified based on performing the response action. | 06-23-2011 |
Karthikeyan Bhargavan, Cambridge GB
| Patent application number | Description | Published |
|---|---|---|
| 20080288622 | Managing Server Farms - Manual management of server farms is expensive. Low-level tools and the sheer complexity of the task make it prone to human error. By providing a typed interface using service combinators for managing server farms it is possible to improve automated server farm management. Metadata about a server farm is obtained, for example, from disk images, and this is used to generate a typed environment interface for accessing server farm resources. Scripts are received, from a human operator or automated process, which use the environment interface and optionally also pre-specified service combinators. The scripts are executed to assemble and link together services in the server farm to form and manage a running server farm application. By using typechecking server farm construction errors can be caught before implementation. | 11-20-2008 |
Karthikeyan Kaliyamoorthi, Bangalore IN
| Patent application number | Description | Published |
|---|---|---|
| 20080260222 | Lesion Quantification and Tracking Using Multiple Modalities - A method for lesion detection includes acquiring pre-therapy medical image data from a first modality. Post-therapy medical image data is acquired from a second modality. A transformation matrix for transforming from an image space of the first modality to an image space of the second modality is calculated. A volume of interest is defined from the medical image data of the first modality. The volume of interest includes one or more lesions. The volume of interest is automatically copied to the medical image data of the second modality using the calculated transformation matrix. Treatment is directed to the lesion using the medical image data of the second modality including the copied volume of interest data. | 10-23-2008 |
Karthikeyan Karthikeyan Venkatanarayanan, Hyderabad IN
| Patent application number | Description | Published |
|---|---|---|
| 20110152511 | GENETICALLY TRANSFORMED MICROORGANISMS WITH SIMULTANEOUS ENHANCEMENT OF REDUCTION POTENTIAL AND REDUCTIVE ENZYME ACTIVITIES FOR BIOMASS FERMENTATION - The present invention describes the genetic engineering of production microorganisms used in biotechnology to improve their properties so that they produce industrially useful products more efficiently from fermentable sugars derived from biomass. The engineered microorganisms endowed with functional coupling of oxidation and reduction of substrates by dehydrogenases requiring pyridine nucleotides (NAD/NADH) result in simultaneous enhancement of reduction potential enzyme activity involving the transfer of electrons. In particular, this invention relates to the construction of an excisable gene expression cassette for expression of two different dehydrogenases leading to enhanced production of ethanol. | 06-23-2011 |
Karthikeyan Kasthuriswamy, K.r. Puram IN
| Patent application number | Description | Published |
|---|---|---|
| 20100281072 | AUTOMATED MIGRATION OF TRANSLATION MAPS FOR USE IN EXCHANGING DOCUMENTS BETWEEN ENTITIES - A method for migrating a legacy translation map to an evolved translation map includes determining an input file structure from input file structure information in the legacy translation map, determining an output file structure from output file structure information in the legacy translation map, and creating an XML binding object representation of source code for the input and output file structure. The method may further include creating an evolved language object representation of translation instructions in the legacy translation map, adding temporary segments to the XML binding object representation for the input file structure, and generating evolved language object representation of instructions to write input data into the temporary segments. The evolved language object representation of translation instructions is then merged into the XML binding object representation. The evolved translation map is then generated as an XML file based on the XML binding object representation resulting from the merging. | 11-04-2010 |
Karthikeyan Kumaresan, Tucson, AZ US
| Patent application number | Description | Published |
|---|---|---|
| 20100239914 | CATHODE FOR LITHIUM BATTERY - The present invention relates to cathodes used in electrochemical cells. A force, or forces, applied to portions of an electrochemical cell as described in this application can reduce irregularity or roughening of an electrode surface of the cell, improving performance. The cathodes described herein may possess enhanced properties that render them particularly suitable for use in electrochemical cells designed to be charged and/or discharged while a force is applied. In some embodiments, the cathode retains sufficient porosity to charge and discharge effectively when a force is applied to the cell. Cathodes described herein may also comprise relatively high electrolyte-accessible conductive material (e.g., carbon) areas. The cathode may comprise a relatively low ratio of the amount of binder and/or mass of electrolyte to cathode active material (e.g., sulfur) ratio in some instances. In some embodiments, electrochemical cells comprising the cathodes described herein may achieve relatively high specific capacities and/or relatively high discharge current densities. In addition, the cathode described herein may exhibit relatively high cathode active material (e.g., sulfur) utilization during charge and discharge. In still further cases, the electrical conductivity between conductive material in the cathode (e.g., carbon) may be enhanced during the application of the force. | 09-23-2010 |
| 20120070746 | LOW ELECTROLYTE ELECTROCHEMICAL CELLS - Electrochemical cells including components and configurations for electrochemical cells, such as rechargeable lithium batteries, are provided. The electrochemical cells described herein may include a combination of components arranged in certain configurations that work together to increase performance of the electrochemical cell. In some embodiments, such combinations of components and configurations described herein may minimize defects, inefficiencies, or other drawbacks that might otherwise exist inherently in prior electrochemical cells, or that might exist inherently in prior electrochemical cells using the same or similar materials as those described herein, but arranged differently. | 03-22-2012 |
Karthikeyan Lakshmi Narayanan, Tamil Nadu IN
| Patent application number | Description | Published |
|---|---|---|
| 20120035357 | PROCESS FOR THE PREPARATION OF CARBAPENEM ANTIBIOTIC - The present invention relates to an improved process for the preparation of the carbapenem antibiotic of formula (I) or its salts, hydrates and esters. The present invention further provides novel crystalline form of compound of general formula (III), wherein R | 02-09-2012 |
Karthikeyan Maharajapuram S., Burscheid DE
| Patent application number | Description | Published |
|---|---|---|
| 20080315654 | Vehicle Seat - A vehicle seat ( | 12-25-2008 |
Karthikeyan Pichaikannu, Orange, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090293250 | Compact universal offset pulling head for fasteners - A universal offset pulling head assembly for exerting an axial pulling force on a fastener allows the same pulling head assembly to be utilized for a variety of different fastener sizes and types by exchanging a front plate assembly, where the front plate assembly may comprise variable nose pieces according to the type of fastener to be installed. Because the front plate assembly is subject to the most severe wear, other components of the pulling head assembly may continue to be utilized and the front plate assembly discarded. The disclosed pulling head assembly utilizes a stationary guiding member which prevents damage which might otherwise occur because of severe bending moments. | 12-03-2009 |
Karthikeyan Ponnalagu, Madurai IN
| Patent application number | Description | Published |
|---|---|---|
| 20090099855 | Method for Generating Software Variants - A method generates, based on an original business process comprising at least one component, a variant business process comprising at least one variation compared to the original business process. The method comprises the steps of developing a variant meta-model, representing the at least one variation, instantiating and verifying the developed variant meta-model portion to obtain a variant model, and implementing the variant model to generate the variant. The method also comprises developing a formalism for defining the at least one variation. | 04-16-2009 |
| 20090109225 | SYSTEM AND METHOD TO ORGANIZE ASSETS IN A REPOSITORY - The embodiments of the invention provide a method of organizing assets having artifacts in a repository. The method begins by organizing artifacts of at least one of the assets as internal nodes in a graph based on a context. The method simultaneously organizes the assets as external nodes in the graph based on the context. The internal nodes comprise artifacts having metadata that is updated by an artifact producer and/or an asset producer. Moreover, the external nodes comprise artifacts that are defined and/or updated by roles other than an artifact producer and/or an asset producer. | 04-30-2009 |
| 20100305986 | Using Service Exposure Criteria - Techniques for performing service exposure for reuse of one or more services are provided. The techniques include analyzing applicability of service criteria for a candidate service, identifying one or more services that are contextually-related to the candidate service, and using the service criteria applicable to the candidate service to expose the one or more services contextually-related to the candidate service. | 12-02-2010 |
Karthikeyan Ponnalagu, Tamil Nadu IN
| Patent application number | Description | Published |
|---|---|---|
| 20120072227 | AUTOMATICALLY GENERATING HIGH QUALITY SOA DESIGN FROM BUSINESS PROCESS MAPS BASED ON SPECIFIED QUALITY GOALS - Methods and systems for automatically generating a service oriented architecture (SOA) design. A set of business process maps for the domain under consideration is defined and a design quality goal (function) that should be met (optimized) is specified. The design goal/function involves SOA metrics like coupling, cohesion, granularity, etc., which the system under consideration is pre-programmed to compute on any SOA design. The system takes as input the set of business process maps and the design quality goal/functions. It first generates semantic business process maps by identifying key concepts that occur in the task and business item descriptions. Next, it efficiently searches the service design space by starting with a seed design and employing a sequence of moves to iteratively optimize it. It outputs a set of possible SOA designs that meet the specified quality goals or optimizes the specified function, from where a user may select the final design. | 03-22-2012 |
Karthikeyan Ramamurthi, Bangalore IN
| Patent application number | Description | Published |
|---|---|---|
| 20100005373 | Majority Voting Logic Circuit for Dual Bus Width - A circuit is presented for determining whether or not to invert a bus, for example a data bus that is operable having multiple widths. The circuit includes comparison circuitry that can receive both the current and next values for the bus and individually compare the current and next values of the bits on the bus to determine whether these have changed. A voting circuit receives the result of these determinations and also receives an indication of width with which the bus is being operated. The voting circuit then determines a bus inversion values based upon whether the number of bits on the data that have changed exceed a value that depends upon the indication of bus width. | 01-07-2010 |
Karthikeyan Sadhasivam, Richardson, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090217039 | System, Method and Apparatus for Authenticating Calls - The present invention provides a system, method and apparatus for authenticating calls that is a robust Anti-vishing solution. The present invention can identify Caller ID spoofing, verify dialed number to detect man-in-the middle and verify called party against dialed digits to detect impersonation. This solution can handle calls coming from any phone any where with little impact on user experience. Two separate solutions are tailored for smart phones (communication devices capable of running application software) and traditional phones to reduce the impact to user experience while providing robust verification. | 08-27-2009 |
Karthikeyan Sankaralingam, Madison, WI US
| Patent application number | Description | Published |
|---|---|---|
| 20100238942 | LOOKUP ENGINE WITH PROGRAMMABLE MEMORY TOPOLOGY - An architecture for a specialized electronic computer for high-speed data lookup employs a set of tiles each with independent processors and lookup memory portions. The tiles may be programmed to interconnect to form different memory topologies optimized for the particular task. | 09-23-2010 |
Karthikeyan Sathrugnan, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110163032 | HIGH RECOVERY SULFATE REMOVAL PROCESS - A high recovery sulfate removal process comprises treating a feed water stream conditioned with antiscalant from a source with a reverse osmosis membrane system to produce a purified water permeate stream and a reject stream containing the retained or rejected ions and organic matter. The reject stream is further treated to remove dissolved and suspended species. The reject stream flows to a desaturation/clarification process. A preferred process includes a constant stirred tank reactor (CSTR) where co-precipitation agent is added followed by a clarifier. Water recycled from the clarifier overflow is blended with feed water stream. The removed solids are collected as sludge or a slurry and disposed of in a manner consistent with applicable regulations. | 07-07-2011 |
| 20110233153 | RADIAL FLOW COLUMN - Aspects and embodiments of the present invention are directed to apparatus and methods of filtering a fluid to reduce a level of at least one contaminant therein. The filtering of the fluid may be accomplished with a radial flow filtration column comprising a fluid chamber having an inlet, an outlet, and a side wall, an inner permeable retainer positioned in the fluid chamber, an outer permeable retainer positioned in the fluid chamber spaced apart from and surrounding the inner permeable retainer, a media bed compartment formed between the inner permeable retainer and the outer permeable retainer, and an adjustable element biased into the media bed compartment and configured to maintain a predetermined packing density of a media bed to be disposed within the media bed compartment. | 09-29-2011 |
Karthikeyan Selvarajan, Thornleigh AU
Karthikeyan Sethuramasubbu, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100313186 | DEVELOPER-MANAGED DEBUGGER DATA RECORDS - A developer analysis record supports debugging. One developer analysis record contains a copy of a debuggee source code expression including one or more variables. An expression location in the record specifies the location of the expression within debuggee source code, and an expression scope specifies the scope of the expression within the source code. Developer comments about the expression may be stored in the record, distinct from source code and free from programming language syntax restrictions. The developer analysis record can be stored by a developer during one debugger session and then retrieved by the same or another developer during a later debugger session. The developer analysis record can be displayed and updated in a floating window, such as a tear-off floating datatip window. | 12-09-2010 |
Karthikeyan Sharavanan, Mannheim IN
| Patent application number | Description | Published |
|---|---|---|
| 20100316865 | COATED POLYOXYMETHYLENES - The present invention relates to coated polyoxymethylene moldings, comprising at least one polyoxymethylene homo- or copolymer A), and also, if appropriate, further additives B), which has been coated on the surface with at least one binder C) and one formaldehyde scavenger D), wherein the binder C) used comprises a polyalkylene oxide C | 12-16-2010 |
Karthikeyan Sharavanan, Mannheim DE
| Patent application number | Description | Published |
|---|---|---|
| 20090275724 | IONIC LIQUIDS IN THE PREPARATION OF POMS - Process for preparing polyoxymethylenes by polymerization of the monomers a) in the presence of cationically active initiators b) and, if appropriate in the presence of regulators c) and subsequent deactivation d) and discharge from the reactor, wherein at least one ionic liquid is used as initiator b). | 11-05-2009 |
| 20100291389 | COATED POLYOXYMETHYLENES - Coated polyoxymethylene moldings comprising at least one polyoxymethylene homo- or copolymer A), and also, if appropriate, further additives B), which has been coated on the surface with at least one binder C) and one formaldehyde scavenger D), wherein the binder C) used comprises a polyalkylene oxide C | 11-18-2010 |
| 20100324184 | COATED POLYOXYMETHYLENES - The present invention relates to coated polyoxymethylene moldings comprising at least one polyoxymethylene homo- or copolymer A), and also, if appropriate, further additives B), which has been coated on the surface with at least one binder C) and one formaldehyde scavenger D), wherein the binder C) used comprises a polyalkylene oxide C | 12-23-2010 |
| 20110313086 | POLYOXYMETHYLENES FOR DIESEL APPLICATIONS - Thermoplastic molding materials comprising | 12-22-2011 |
Karthikeyan Soundarapandian, Plano, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20100073207 | Delta-Sigma Analog-to-Digital Converters and Methods to Calibrate Delta-Sigma Analog-to-Digital Converters - Delta-sigma analog-to-digital converters (ADCs) and methods to calibrate methods to delta-sigma ADCs are disclosed. In one particular example, a delta-sigma ADC is described, including an n-bit feedback digital-to-analog converter (DAC) having a number of unit elements, and is configured to provide a feedback signal to a summing device, which generates a difference signal based on an analog input signal and the feedback signal. An n-bit ADC is included to generate an n-bit digital signal based on the difference signal. A dynamic element matching device selects one or more unit elements in the DAC based on the n-bit digital signal. A storage device, such as a memory, stores error coefficients corresponding to the plurality of unit elements. Finally, a digital corrector is included to receive the selection of unit elements, receive error coefficients corresponding to the selected unit elements, and adjust the n-bit digital signal based on the received error coefficients. | 03-25-2010 |
Karthikeyan Vaithianathan, Beaverton, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110093518 | NEAR OPTIMAL CONFIGURABLE ADDER TREE FOR ARBITRARY SHAPED 2D BLOCK SUM OF ABSOLUTE DIFFERENCES (SAD) CALCULATION ENGINE - Embodiments of a near optimal configurable adder tree for arbitrary shaped 2D block sum of absolute differences (SAD) calculation engine are generally described herein. Other embodiments may be described and claimed. In some embodiments, a configurable two-dimensional adder tree architecture for computing a sum of absolute differences (SAD) for various block sizes up to 16 by 16 comprises a first stage of one-dimensional adder trees and a second stage of one-dimensional adder trees, wherein each one-dimensional adder tree comprises an input routing network, a plurality of adder units, and an output routing network. | 04-21-2011 |