Patent application number | Description | Published |
20110229179 | IMAGE FORMING APPARATUS - An image forming apparatus including a fixing liquid applicator to apply a fixing liquid to a recording medium, a transfer device to transfer a toner image from a toner image bearing member onto the recording medium to which the fixing liquid is applied while the toner image is in contact with the fixing liquid, and a fixing device to fix the toner image on the recording medium by heating the toner image and the fixing liquid. The fixing liquid comprises a plasticizer having a function to swell and soften a toner. | 09-22-2011 |
20120020706 | IMAGE FORMING APPARATUS - An image forming apparatus includes a fixing liquid applicator to apply a fixing liquid to a recording medium before a toner image is transferred on the recording medium, a transfer device to transfer a toner image from a toner image bearing member onto the recording medium applied with the fixing liquid, and a fixing device to fixe the toner image on the recording medium by heating. The fixing liquid applicator includes an application member disposed opposing a face of the recording medium on which the toner image is transferred to apply to the recording medium the fixing liquid borne on a surface of the application member, a supply unit to supply the fixing liquid to the application member, and a sealing device to form along with the application member a sealed space in which the supply unit and the fixing liquid to be supplied to the application member are sealed. | 01-26-2012 |
20120045262 | Image forming apparatus - An image forming apparatus, including a fixing liquid applicator applying a fixing liquid including a plasticizer swelling and softening a toner forming a toner image to fix on a recording medium thereto before bearing the toner image; a transferer transferring the toner image on a toner image bearer onto the recording medium while contacting the toner image to the fixing liquid thereon; and a fixing device heating the toner image and the fixing liquid to fix the toner image thereon, wherein the fixing liquid applicator comprises an application member bearing the fixing liquid on its surface and apply the liquid on a surface of the recording medium the toner image is transferred onto; a feeder feeding the fixing liquid to the application member; and an inducement mechanism inducing the fixing liquid pooling at a delivery point where the feeder feeds the fixing liquid to the application member out of the point. | 02-23-2012 |
20150234316 | IMAGE FORMING APPARATUS INCORPORATING CONTROLLER FOR DETERMINING EXPOSURE USED FOR IMAGE FORMATION AND IMAGE FORMING METHOD FOR DETERMINING EXPOSURE USED FOR IMAGE FORMATION - An image forming apparatus includes an image bearer, a charger, an exposure device, a developing device, an image density sensor, and a controller. The controller is configured to charge the image bearer, expose the image bearer with a first exposure that saturates potential of the image bearer after exposure to form a latent image pattern on the image bearer, develop the latent image pattern into a toner pattern while changing a developing electrical field, detect a first image density of the toner pattern, determine developing bias and charging bias, form patterns with the first exposure and a second exposure smaller than the first exposure, detect a second image density of the patterns, and determine an exposure to output an image based on the second image density, the first exposure, and the second exposure. | 08-20-2015 |
Patent application number | Description | Published |
20090015465 | MIXER CIRCUIT AND RADAR TRANSCEIVER - A mixer circuit includes: a rat race circuit including a ring-shaped transmission line with a first terminal, a second terminal, a third terminal, and a fourth terminal, the first to fourth terminals being disposed, in that order, clockwise along the transmission line and equally spaced λ | 01-15-2009 |
20090237166 | HIGH FREQUENCY POWER AMPLIFIER - A high frequency power amplifier comprises: a multi-finger transistor with transistor cells electrically connected in parallel; an input side matching circuit connected to gate electrodes of the transistor cells; and resonant circuits respectively connected between the gate electrode of a transistor cell and the input side matching circuit. The resonant circuit resonates at a second harmonic of the operating frequency of the transistor or within a predetermined range of frequencies having a center at the second harmonic of the operating frequency, and becomes a high-impedance load at the second harmonic, or an open load. | 09-24-2009 |
20100052799 | VOLTAGE CONTROLLED OSCILLATOR, MMIC, AND HIGH FREQUENCY WIRELESS DEVICE - A voltage controlled oscillator having low phase noise and including: a variable resonator including a varactor and a control voltage terminal; and an open-end stub connected in parallel to the variable resonator, the open-end stub having a length shorter than or equal to an odd multiple of one quarter of a wavelength of a harmonic signal plus one sixteenth of the wavelength of the harmonic signal, and longer than or equal to an odd multiple of one quarter of the wavelength of the harmonic signal minus one sixteenth of the wavelength of the harmonic signal. In this structure, a high Q value is realized for a fundamental wave frequency. Fluctuation in a control voltage due to a harmonic signal is controlled. | 03-04-2010 |
20100060362 | CASCODE CIRCUIT - A cascode circuit for a high-gain or high-output millimeter-wave device that operates with stability. The cascode circuit including two cascode-connected transistors includes: a first high electron mobility transistor (HEMT) including a source that is grounded; a second HEMT including a source connected to a drain of the first HEMT; a reflection gain restricting resistance connected to the gate of the second HEMT, for restricting reflection gain; and an open stub connected to a side of the reflection gain restricting resistance which is opposite the side connected to the second HEMT, for short-circuiting high-frequency signals at a predetermined frequency and nearby frequencies. | 03-11-2010 |
20100117711 | SEMICONDUCTOR CHIP AND RADIO FREQUENCY CIRCUIT - A two-terminal semiconductor device is formed on a semiconductor substrate. Two wiring patterns are respectively connected to terminals of the semiconductor device, and two electrode pads are respectively connected to the wiring patterns for connecting a signal input/output circuit formed on a separate substrate. Two parallel wiring patterns are respectively connected to the wiring patterns, and two reactance-circuit connection electrode pads are respectively connected to the parallel wiring patterns for electrically connecting a reactance circuit formed on the separate substrate separately from the signal input/output circuit. | 05-13-2010 |
20100315177 | EVEN HARMONIC MIXER - Provided is an even harmonic mixer which is reduced in cost and size. The even harmonic mixer includes: a transducer in which a conductor of a microstrip line is connected to a ground plane of a waveguide, for transducing an RF signal transmitted in a waveguide mode into a transmission mode of the microstrip line; an anti-parallel diode pair which is cascade-connected to a microstrip line side of the transducer, and formed on a semiconductor substrate; a branching circuit for branching an LO signal and an IF signal; an open-end stub which is disposed between the transducer and the anti-parallel diode pair, and has a line length of about ½ wavelength at an RF signal frequency; and an open-end stub which is disposed between the anti-parallel diode pair and the branching circuit, and has a line length of about ¼ wavelength at the RF signal frequency. | 12-16-2010 |
20110175686 | HIGH FREQUENCY SECOND HARMONIC OSCILLATOR - A high frequency second harmonic oscillator includes a transistor, a first signal line connected at a first end to the base or gate of the transistor, a first shunt capacitor connected at a first end to a second end of the first signal line and at a second end to ground, a second signal line connected at a first end to the collector or drain of the transistor, a second shunt capacitor connected at a first end to a second end of the second signal line and at a second end to ground, and a high capacitance capacitor connected between the first signal line and the second signal line. The first signal line has a length equal to an odd integer multiple of one quarter of the wavelength of a fundamental signal, plus or minus one-sixteenth of the wavelength of the fundamental signal. | 07-21-2011 |
20120025366 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a semiconductor device comprises: forming a circuit pattern and a first metal film on a first major surface of a body wafer; forming a through-hole penetrating the body wafer from a second major surface of the body wafer and reaching the first metal film; forming a second metal film on a part of the second major surface of the body wafer, on an inner wall of the through-hole, and on the first metal film exposed in the through-hole; forming a recess on a first major surface of a lid wafer; forming a third metal film on the first major surface of the lid wafer including inside the recess of the lid wafer; with the recess facing the circuit pattern, and the first metal film contacting the third metal film, joining the lid wafer to the body wafer; and dicing the joined body wafer and lid wafer along the through-hole. | 02-02-2012 |
20120094481 | METHOD OF MANUFACTURING AIRBRIDGE - In making an airbridge structure, a second resist layer is applied over a first resist layer. The resist layers are exposed and developed to have a predetermined width W | 04-19-2012 |
20120299178 | SEMICONDUCTOR DEVICE - A semiconductor device includes: a main body chip; a circuit pattern on a front surface of the main body chip and including a first pad; a cap chip including a first recess in a front surface of the cap chip and a second recess in a back surface of the cap chip, the cap chip being joined to the main body chip with the first recess facing the circuit pattern; a second pad on a bottom surface of the first recess of the cap chip; a first metallic member inlaid in the second recess of the cap chip; a first through electrode electrically connecting the second pad to the first metallic member through the cap chip; and a bump electrically connecting the first pad to the second pad. | 11-29-2012 |
20130032817 | POWER AMPLIFIER - A power amplifier includes a semiconductor substrate including transistor cells, a drain electrode for the transistor cells located on the semiconductor substrate, a drain pad located on the semiconductor substrate and connected to the drain electrode, an ion-implanted resistance located in the semiconductor substrate and extending along and in contact with the drain pad, a floating electrode located on the semiconductor substrate and in contact with the ion-implanted resistance, and an output matching circuit located outside the semiconductor substrate. The power amplifier further includes a wire connecting the drain pad to the output matching circuit. | 02-07-2013 |
20140117411 | MONOLITHIC INTEGRATED CIRCUIT - A monolithic integrated circuit includes: a substrate having a diode region and a transistor region; a first semiconductor layer on the substrate in the diode region and in the transistor region; a second semiconductor layer on the first semiconductor layer in the diode region and in the transistor region; a third semiconductor layer on the second semiconductor layer in the transistor region, but not located in the diode region; a first electrode in the diode region and connected to the first semiconductor layer; a second electrode in the diode region and connected to the second semiconductor layer; and a source electrode, a gate electrode, and a drain electrode which are on the third semiconductor layer. | 05-01-2014 |
20150340999 | LINEARIZER - A linearizer includes: an input terminal; an output terminal; a connection point connected between the input terminal and the output terminal; a diode connected to the connection point; a voltage terminal; and a resistor connected between the voltage terminal and the connection point, wherein 0 V is applied to the voltage terminal. | 11-26-2015 |
20150341000 | LINEARIZER - A linearizer includes: a branch circuit having an input transmission line connected between an input terminal and a branch point, a first output transmission line connected between the branch point and a first output terminal, and a second output transmission line connected between the branch point and a second output terminal; a diode having an anode connected to the branch point and a cathode; and a bias circuit biasing the diode. | 11-26-2015 |
Patent application number | Description | Published |
20080290951 | SEMICONDUCTOR DEVICE - A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass. | 11-27-2008 |
20100156541 | SEMICONDUCTOR DEVICE - A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass. | 06-24-2010 |
20120032296 | SEMICONDUCTOR DEVICE, SEMICONDUCTOR CIRCUIT SUBSTRATE, AND METHOD OF MANUFACTURING SEMICONDUCTOR CIRCUIT SUBSTRATE - A semiconductor circuit substrate includes a transistor-forming substrate and a circuit-forming substrate. The transistor-forming substrate is a GaN substrate and has a Bipolar Junction Transistor (BJT) located in its top surface. The bottom surface of the transistor-forming substrate is flat and has contact regions. The circuit-forming substrate is a material other than a compound semiconductor and has no semiconductor active elements. The circuit-forming substrate has a flat top surface, contact regions buried in and exposed at the top surface, and passive circuits. The transistor-forming substrate and the circuit-forming substrate are directly bonded together without any intervening film, such as an insulating film. | 02-09-2012 |
Patent application number | Description | Published |
20100149956 | OPTICAL INTEGRATED DEVICE, METHOD FOR DETECTING LIGHT, OPTICAL PICKUP, AND OPTICAL DISC APPARATUS - An optical integrated device includes a light source; a light splitting-and-guiding section that splits a reflected light beam into two end light beams, a connection light beam, and a residual light beam, and guides the two end light beams and the connection light beam in directions different from a direction of the residual light beam; and a light receiving section that receives the two end light beams and the connection light beam with photodetection devices divided, in the tangential direction, into at least two regions within a range in which the connection light beam is incident, receives the residual light beam with photodetection devices divided, in the tangential direction, into regions having widths corresponding to portions on which the two end light beams are incident, and outputs a detection signal in accordance with an amount of light received with each of the photodetection devices. | 06-17-2010 |
20110164488 | OPTICAL PICKUP AND OPTICAL DISC APPARATUS - Provided is an optical pickup including: a light-source emitting a light-beam; an objective lens collecting the light-beam on a desired recording layer among one or two recording layers or more installed in an optical disc and where spirally- or concentrically-shaped tracks are formed; a lens-moving unit moving the objective lens in a tracking direction toward at least an inner-circumference or outer-circumference side; a light splitting device splitting a reflected light-beam into reflected light-beams and propagating the light-beams; a light-detecting device generating central, inner-circumference-side, and outer-circumference-side light-detecting signals according to received light amounts thereof by central, inner-circumference-side, and outer-circumference-side light-detecting areas, receiving central, inner-circumference-side, and outer-circumference-side portions of an image of the reflected light-beam in the radial direction and allowing a signal processing unit to generate a tracking error signal by using the inner-circumference-side and outer-circumference-side-light-detecting signals, being added with a product of a predetermined coefficient and the central-light-detecting signal. | 07-07-2011 |
Patent application number | Description | Published |
20080235192 | INFORMATION RETRIEVAL SYSTEM AND INFORMATION RETRIEVAL METHOD - An information retrieval system includes a a database which holds information items arranged in a hierarchical data structure. An information retrieval device outputs a search result from the database in response to a goodness of fit computed for each of the information items to search criteria. An input unit inputs hierarchy information indicating a hierarchy to which priority is given for outputting of a corresponding search result. A goodness-of-fit change unit assigns a bias value to a goodness of fit computed for each of information items from among the information items held in the database, which are arranged at the hierarchy indicated by the hierarchy information inputted by the input unit, to change the goodness of fit. | 09-25-2008 |
20150058397 | INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING APPARATUS, TERMINAL APPARATUS AND INFORMATION TRANSMISSION METHOD - An information processing system includes one or more terminal apparatuses and an information processing apparatus connected via a network. The system converts stored information, based on a method determined for each of the terminal apparatuses, into at least first transmission information and second transmission information to be transmitted to the terminal apparatuses; transmits the first transmission information including a first display part of the information to one of the terminal apparatuses and transmits the second transmission information including a second display part of the information different from the first display part to the one of the terminal apparatuses after transmitting the first transmission information; and displays ones of the at least first transmission information and second transmission information. | 02-26-2015 |
20150156229 | TERMINAL APPARATUS, INFORMATION PROCESSING SYSTEM AND INFORMATION PROCESSING METHOD - A terminal apparatus has a first setting of displaying a portion of information designated by an information processing apparatus and a second setting of being able to display another portion. The terminal apparatus receives transmission information converted from the information by the information processing apparatus to include a portion to be displayed first and transmission information converted from the information to include another portion; stores the transmission information thus received; and displays, in a case of the first setting, the designated portion and displays, in a case of the second setting, a portion based on an operation performed on the terminal apparatus. The terminal apparatus receives, upon switching from the second setting to the first setting, the transmission information corresponding to the designated portion based on whether already receiving the transmission information corresponding to the designated portion. | 06-04-2015 |
20150249749 | TERMINAL APPARATUS, INFORMATION PROCESSING SYSTEM, AND INFORMATION TRANSMISSION METHOD - A terminal apparatus has a first setting and a second setting that includes a receiver receiving first transmission information and second transmission information including a part of the information, a transmission information storage storing transmission information including the first and the second transmission information, a display processor displaying the first transmission information based on information specified by the information processing apparatus in the first setting, and displaying the second transmission information based on an operation performed on the terminal apparatus in the second setting, and a transmission storage controller controlling the transmission information storage to store the first transmission information based on the specified information in a first storage area for a first setting use in the transmission information storage, and to store the second transmission information based on the operation in a second storage area for a second setting use in the transmission information storage. | 09-03-2015 |