| Patent application number | Description | Published |
|---|
| 20080199719 | Data recording medium for data storage and method of recording or erasing data using the same - Provided is a data recording medium having improved data recording/storage characteristics and with an improved structure to have a higher data storage capacity, and a method of recording and/or easing data using the same. The data recording medium may include a Cu electrode layer on a substrate, and a data recording layer formed of a compound including a metal and at least one non-metal selected from the group consisting of S, Se, and Te, on the Cu electrode layer. Data is recordable to or erasable from the data recording layer by changing the resistance of the data recording layer by diffusing Cu ions from the Cu electrode layer to the data recording layer or by erasing Cu ions from the data recording layer by diffusing Cu ions from the data recording layer back to the Cu electrode layer, according to a voltage pulse applied to the data recording layer. | 08-21-2008 |
| 20080210998 | Method for manufacturing material layer, method for manufacturing ferroelectric capacitor using the same, ferroelectric capacitor manufactured by the same method, semiconductor memory device having ferroelectric capacitor and manufacturing method thereof - Provided is a method for manufacturing a material layer capable of increasing the deposition rate of a noble metal layer on a ferroelectric layer, a method for manufacturing a ferroelectric capacitor using the same, a ferroelectric capacitor manufactured by the same method, and a semiconductor memory device having the ferroelectric capacitor and a manufacturing method thereof. According to a method for manufacturing the material layer, a ferroelectric layer is formed. The ferroelectric layer may be exposed to seed plasma, and a material layer including a source material of the seed plasma may be formed on a region of the ferroelectric layer exposed to the seed plasma. | 09-04-2008 |
| 20080258127 | Precursor, thin layer prepared including the precursor, method of preparing the thin layer and phase-change memory device - A Te precursor containing Te, a 15-group compound (for example, N) and/or a 14-group compound (for example, Si), a method of preparing the Te precursor, a Te-containing chalcogenide thin layer including the Te precursor, a method of preparing the thin layer; and a phase-change memory device. The Te precursor may be deposited at lower temperatures for forming a Te-containing chalcogenide thin layer doped with a 15-group compound (for example, N) and/or a 14-group compound (for example, Si). For example, the Te precursor may employ plasma enhanced chemical vapor deposition (PECVD) or plasma enhanced atomic layer deposition (PEALD) at lower deposition temperatures. The GST phase-change layer doped with a 15-group compound (for example, N) and/or a 14-group compound (for example, Si) formed by employing the Te precursor may have a decreased reset current, and thus when a memory device including the same is employed, its integration may be possible, and operation with higher capacity and/or higher speed may be possible. | 10-23-2008 |
| 20080272366 | Field effect transistor having germanium nanorod and method of manufacturing the same - A field effect transistor having at least one Ge nanorod and a method of manufacturing the field effect transistor are provided. The field effect transistor may include a gate oxide layer formed on a silicon substrate, at least one nanorod embedded in the gate oxide layer having both ends thereof exposed, a source electrode and a drain electrode connected to opposite sides of the at least one Ge nanorod, and a gate electrode formed on the gate oxide layer between the source electrode and the drain electrode. | 11-06-2008 |
| 20080278989 | Resistive memory device and method of manufacturing the same - Provided is a resistive memory device and a method of manufacturing the resistive memory device that includes a bottom electrode, an insulating layer that is formed on the bottom electrode and has a hole that exposes the bottom electrode, a resistance layer and an intermediate layer which are formed in the hole, a switch structure formed on a surface of the intermediate layer, and an upper electrode formed on the switch structure. | 11-13-2008 |
| 20090052226 | Resistive random access memory device - Provided is a resistive random access memory device that includes a storage node connected to a switching device. The resistive random access memory device includes a first electrode, a resistance variable layer, and a second electrode which are sequentially stacked, wherein a diffusion blocking layer is formed between the first electrode and the resistance variable layer or between the resistance variable layer or/and the second electrode. | 02-26-2009 |
| 20090068808 | Method of manufacturing a nonvolatile semiconductor memory device having a gate stack - A nonvolatile semiconductor memory device includes a semiconductor substrate having a source region and a drain region, and a gate stack formed on the semiconductor substrate between and in contact with the source and drain regions. The gate stack includes, in sequential order from the substrate: a tunneling film; a first trapping material film doped with a first predetermined impurity, the first trapping material film having a higher dielectric constant than the nitride film (Si | 03-12-2009 |
| 20090126173 | Method of manufacturing a capacitor and memory device including the same - In a capacitor of a semiconductor device, a method of manufacturing the same and a memory device including the capacitor, the capacitor includes a lower electrode, a dielectric film on the lower electrode, an upper electrode on the dielectric film, and a first reaction barrier film for preventing a reaction between the lower electrode and the dielectric film, the first reaction barrier film being interposed between the lower electrode and the dielectric film. | 05-21-2009 |
| 20090256128 | Nonvolatile data storage, semicoductor memory device including nonvolatile data storage and method of forming the same - A data storage and a semiconductor memory device including the same are provided, the data storage including a lower electrode, a first discharge prevention layer stacked on the lower electrode, a phase-transition layer on the first discharge prevention layer, a second discharge prevention layer stacked on the phase-transition layer, and an upper electrode stacked on the second discharge prevention layer. The phase transition layer includes oxygen and exhibits two different resistance characteristics depending on whether an insulating property thereof changed. The first and second discharge prevention layers block discharge of the oxygen from the phase transition layer. | 10-15-2009 |
| 20090326254 | ORGANIC-METAL PRECURSOR MATERIAL AND METHOD OF MANUFACTURING METAL THIN FILM USING THE SAME - Provided are an organic-metal precursor material that can be readily decomposed without reacting with an oxidant, a method of manufacturing a metal thin film using the organic-metal precursor material, and a metal thin film prepared using the organic-metal precursor material. The organic-metal precursor material is an organic molecule having lone-pair electrons selected from the group consisting of ether, amine, tetrahydrofuran (THF), a phosphine group, and a phosphite group, and has a structure of covalent coordination bond. | 12-31-2009 |
| 20100159637 | Antimony precursor, phase-change memory device using the antimony precursor, and method of manufacturing the phase-change memory device - An antimony precursor including antimony, nitrogen and silicon, a phase-change memory device using the same, and a method of making the phase-change memory device. The phase-change memory device may have a phase-change film of a Ge | 06-24-2010 |
| 20100187492 | Multi-bit memory device having reristive material layers as storage node and methods of manufacturing and operating the same - Provided are a multi-bit memory device having resistive material layers as a storage node, and methods of manufacturing and operating the same. The memory device includes a substrate, a transistor formed on the substrate, and a storage node coupled to the transistor, wherein the storage node includes: a lower electrode connected to the substrate; a first phase change layer formed on the lower electrode; a first barrier layer overlying the first phase change layer; a second phase change layer overlying the first barrier layer; and an upper electrode formed on the second phase change layer. | 07-29-2010 |
| 20100190291 | Semiconductor memory device with three dimensional solid electrolyte structure, and manufacturing method thereof - The semiconductor memory device includes a variable resistance device having a solid electrolyte in a three-dimensional structure. The variable resistance device includes a first electrode; the solid electrolyte, which has at least two regions with different heights, formed on the first electrode; and a second electrode made of a conductive material formed on the solid electrolyte to cover the regions with different heights. In addition, a multibit semiconductor memory device is provided which includes a bias circuit that can control the intensity of a current and time the current is supplied to the variable resistance device inside a memory cell in multiple steps to configure multibits. | 07-29-2010 |
| 20100221411 | Method for fabricating a three-dimensional capacitor - A capacitor and a method of fabricating the capacitor are provided herein. The capacitor can be formed by forming two or more dielectric layers and a lower electrode, wherein at least one of the two or more dielectric layers is formed before the lower electrode is formed. | 09-02-2010 |
