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Jung-Ho Song

Jung-Ho Song, Suwon-Si KR

Patent application numberDescriptionPublished
20100002507FLASH MEMORY DEVICE REDUCING NOISE OF COMMON SOURCE LINE, PROGRAM VERIFY METHOD THEREOF, AND MEMORY SYSTEM INCLUDING THE SAME - A flash memory device controls a common source line voltage and performs a program verify method. A plurality of memory cells is connected between a bit line and the common source line. A data input/output circuit is connected to the bit line and is configured to store data to be programmed in a selected memory cell of the plurality of memory cells. The data input/output circuit maintains data to be programmed within the data input/output circuit during a program verify operation, and decreases noise in the common source line by selectively precharging the bit line based on the data to be programmed.01-07-2010
20100220535NON-VOLATILE MEMORY DEVICE - A non-volatile memory device includes a feedback circuit and a precharge switching transistor. The feedback circuit generates a feedback signal based on a voltage level of a bitline during a precharge operation. The precharge switching transistor, in response to the feedback signal, controls a precharge current for precharging the bitline. The speed of the precharge operation may be increased and/or mismatch of the bias signals in precharging a plurality of bitlines may be reduced.09-02-2010

Jung-Ho Song, Daejeon KR

Patent application numberDescriptionPublished
20090116523HYBRID LASER DIODE - Provided is a hybrid laser diode. The hybrid laser diode includes: a silicon layer constituting a slab waveguide; and a compound semiconductor layer disposed on the silicon layer to constitute a channel waveguide.05-07-2009
20090152528HIGH-POWER, BROAD-BAND, SUPERLUMINESCENT DIODE AND METHOD OF FABRICATING THE SAME - Provided are a superluminescent diode with a high optical power and a broad wavelength band, and a method of fabricating the same. The superluminescent diode includes: at least one high optical confinement factor (HOCF) region; and at least one low optical confinement factor (LOCF) region having a lower optical confinement factor than the HOCF region. The method includes obtaining a difference of optical confinement factors in the HOCF region and the LOCF region through a selective area growth method, the selective area growth method using a deposition thicknesses difference of thin layers according to a width difference of openings that expose a substrate.06-18-2009
20090154517HYBRID LASER DIODE FOR SINGLE MODE OPERATION AND METHOD OF FABRICATING THE SAME - Provided are a hybrid laser diode for single mode operation, and a method for manufacturing the hybrid laser diode. The hybrid laser diode includes a silicon layer, an active pattern disposed on the silicon layer, and a bonding layer disposed between the silicon layer and the active pattern. Here, the bonding layer includes diffraction patterns constituting a Bragg grating.06-18-2009
20090154880PHOTONICS DEVICE - Provided is a photonics device. The photonics device includes: a substrate including a star coupler region and a transition region; a lower core layer formed on the substrate; and upper core patterns formed on the substrate to define a waveguide. The upper core patterns are disposed on the lower core layer at the transition region, so that the transition region has a multi-layered core structure.06-18-2009
20090252457WAVEGUIDE STRUCTURE AND ARRAYED WAVEGUIDE GRATING STRUCTURE - Provided are a waveguide structure and an arrayed waveguide grating structure. The arrayed waveguide grating structure includes an input star coupler, an output star coupler, and a plurality of arrayed waveguides optically connecting the input star coupler and the output star coupler. Each of the arrayed waveguides includes at least one section having a high confinement factor and at least two sections having a relatively low confinement factor. The sections of the arrayed waveguides having a high confinement factor have the same structure.10-08-2009
20100142579RESONATOR OF HYBRID LASER DIODE - Provided is a resonator of a hybrid laser diode. The resonator includes: a substrate including a semiconductor layer where a hybrid waveguide, a multi-mode waveguide, and a single mode waveguide are connected in series; a compound semiconductor waveguide, provided on the hybrid waveguide of the semiconductor layer, having a tapered coupling structure at one end of the compound semiconductor waveguide, the tapered coupling structure overlapping the multi-mode waveguide partially; and a reflection part provided on one end of the single mode waveguide. The multi-mode waveguide has a narrower width than the hybrid waveguide and the single mode waveguide has a narrower width than the multi-mode waveguide.06-10-2010
20100150499PHOTONICS DEVICE HAVING ARRAYED WAVEGUIDE GRATING STRUCTURES - Provided is a photonics device including at least two arrayed waveguide grating structures. Each of the arrayed waveguide grating structures of the photonics device includes an input star coupler, an output star coupler, and a plurality of arrayed waveguides optically connecting the input star coupler to the output star coupler. Each of the arrayed waveguides includes at least one first section having a high confinement factor and at least two second sections having a low confinement factor. The first sections of the arrayed waveguides have the same structure.06-17-2010
20110141758OPTICAL COUPLER AND ACTIVE OPTICAL MODULE COMPRISING THE SAME - Provided are an optical coupler, which can improve miniaturization and integration, and an active optical module comprising the same. The optical coupler comprises a hollow optical block having a through hole formed to pass an optical fiber therethrough. The hollow optical block comprises at least one incidence plane, at least one internal reflection plane, and at least one tapering region. The incidence plane is disposed at the bottom of the hollow optical block, which is parallel to the through hole, to incident-transmit light. The internal reflection plane is disposed at the top of the hollow optical block, which is opposite to the incidence plane, to reflect the light, which is received from the incidence plane, into the hollow optical block. The tapering region is configured to concentrate the light on the optical fiber in the through hole. The tapering region is formed such that the outer diameter of the hollow optical block decreases away from the internal reflection plane and the incidence plane.06-16-2011

Patent applications by Jung-Ho Song, Daejeon KR

Jung-Ho Song, Daejeon-City KR

Patent application numberDescriptionPublished
20080212973Bi-Directional Optical Module - Provided is a bi-directional optical module including: a transmission optical element including an SOA (semiconductor optical amplifier) aligned on an optical axis of an LD (laser diode) formed on a substrate; and a reception optical element comprising a PD (photodiode) including a light receiving surface perpendicular to the optical axis of the LD of the transmission optical element.09-04-2008
20100081225MASK PATTERN FOR SELECTIVE AREA GROWTH OF SEMICONDUCTOR LAYER AND SELECTIVE AREA GROWTH METHOD USING THE MASK PATTERN FOR SEMICONDUCTOR LAYER - Provided is a mask pattern for selective area growth of a semiconductor layer and a selective area growth method for a semiconductor layer for independently controlling a growth rate and a strain of the semiconductor layer. The selective area growth method includes: forming a plurality of pairs of first mask patterns, the first mask patterns in each pair including a first open area therebetween, the first open area having a width that is wider than a distance causing overgrowth of the semiconductor layer, the pairs of the first mask patterns repeatedly arranged with a period P therebetween; wherein controlling a growth rate and a strain of the semiconductor layer formed on the first open area by adjusting the period P.04-01-2010

Jung-Ho Song, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20100034019SYSTEMS AND METHODS FOR PERFORMING A PROGRAM-VERIFY PROCESS ON A NONVOLATILE MEMORY BY SELECTIVELY PRE-CHARGING BIT LINES ASSOCIATED WITH MEMORY CELLS DURING THE VERIFY OPERATIONS - A nonvolatile memory system is operated by performing a program loop on each of a plurality of memory cells, each program loop comprising at least one program-verify operation and selectively pre-charging bit lines associated with each of the plurality of memory cells during the at least one program-verify operation.02-11-2010

Jung-Ho Song, Yongin-Si KR

Patent application numberDescriptionPublished
20110265866SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell is provided with a hetero-junction front structure (e.g., P/N or P/I/N) and is further provided in a back portion of thereof with a passivation layer having a plurality of openings defined therethrough. A BSF-forming binder material and a back face electrode are provided contacting the back surface and are fired to thereby bind the back face electrode to the structure and to form a BSF region extending from the openings of the passivation layer.11-03-2011