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Jun-Yong
Jun Yong Choi, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20080317879 | Herb Composition for Asthma Maintenance Therapy and Manufacturing Method Thereof - The present invention relates to a herb composition for asthma maintenance therapy based on Chungsangboha-tang, which is known to be effective in asthma, capable of reducing the long-term suffering of asthma patients and improving their quality of lives and a manufacturing method thereof. The herbal composition of the present invention is characterized by comprising 5-18 parts by weight of | 12-25-2008 |
| 20100167951 | DNA CHIP FOR DETECTION OF STAPHYLOCOCCUS AUREUS - The present invention relates to nucleic acid probes specific to | 07-01-2010 |
| 20100167956 | DNA CHIP FOR DETECTION OF ESCHERICHIA COLI - The present invention relates to nucleic acid probes specific to | 07-01-2010 |
Jun Yong Jeong, Chung-Gu KR
| Patent application number | Description | Published |
|---|---|---|
| 20100203386 | CATHODE ACTIVE MATERIAL FOR LITHIUM SECONDARY BATTERY - Disclosed is a lithium secondary battery, which is low in capacity loss after overdischarge, having excellent capacity restorability after overdischarge and shows an effect of preventing a battery from swelling at a high temperature. | 08-12-2010 |
Jun Yong Min, Seongnam KR
| Patent application number | Description | Published |
|---|---|---|
| 20100156081 | IMPACT ABSORBING DEVICE FOR STEERING COLUMN OF VEHICLE - An impact absorbing device for a steering column of a vehicle including a bearing and a pipe in addition to a mounting bracket, the structure of the mounting bracket being modified so that a bearing member and a bolt are installed thereto, wherein the impact transfer to a shaft through a steering shaft in the case of collision of a vehicle can be prevented since capsules and the bolt are broken, thereby preventing excessive impact and interference with peripheral parts. | 06-24-2010 |
Jun Yong Song, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100123269 | PHOTOSENSITIVE RESIN COMPOSITION FOR IMPRINTING PROCESS AND METHOD FOR FORMING ORGANIC LAYER OVER SUBSTRATE - A photosensitive resin composition and a method for forming an organic film on a substrate are provided. Because the photosensitive resin composition for imprinting includes an erythrotol-based monomer or oligomer, an organic film formed by the photosensitive resin composition for imprinting has improved restoring force. Therefore, the photosensitive resin composition is appropriate for imprinting processes. | 05-20-2010 |
Jun Yong Wang, Hsinchu TW
| Patent application number | Description | Published |
|---|---|---|
| 20110068455 | PACKAGING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME - This invention relates to a packaging structure and method for manufacturing the packaging structure. The packaging structure comprises a substrate film, a plurality of chips, a compound resin layer and a support layer. The substrate film is formed with circuits having a plurality of terminals exposed from a solder mask. The chips, each of which has a plurality of pads, under bump metals (UBMs) formed on the pads, and composite bumps disposed onto the UBMs, are bonded onto the substrate film to form the first tape. The second tape comprises the support layer and the compound resin layer formed on the support layer. The first tape and the second tape are both in reel-form and are expanded towards a pair of rollers to be heated and pressurized for encapsulating the chips. | 03-24-2011 |
Jun Yong Zhu, Madison, WI US
| Patent application number | Description | Published |
|---|---|---|
| 20080283757 | Method and system for measuring optical properties of scattering and absorbing materials - A system and method for determining a level of effective residual ink concentration (ERIC) in a piece of recycled paper. The piece of paper is illuminated with a beam of radiation and an amount of the beam of radiation reflected and transmitted by the piece of paper is measured. The level of ERIC is determined as a function of the reflected and transmitted radiation. | 11-20-2008 |
| 20090298149 | Sulfite Pretreatment For Biorefining Biomass - The present invention relates to a method using sulfite pretreatment to overcome recalcitrance of lignocellulose (SPORL). More specifically, it relates to a sulfite-based chemical process for pretreating biomass in solutions to reduce access barriers of enzymes to the lignocellulose, resulting in efficient conversion through enzymatic saccharification. | 12-03-2009 |
Jun-Yong Choi, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090031374 | BROADCAST PROGRAM PURCHASE METHOD AND APPARATUS FOR BROADCAST-ENABLED MOBILE DEVICE - A broadcast program purchase method and apparatus for a broadcast-enabled mobile device are provided for efficiently managing purchased tokens by using a smartcard. In the broadcast program purchase method one or more tokens are acquired for use in purchasing a pay broadcast program and the one or more tokens are stored in a smartcard coupled to the mobile device. The broadcast program purchase apparatus includes a radio communication unit for transmitting a token acquisition request message and a program purchase request message to a billing server and for receiving one or more tokens from the billing server, a smartcard unit for storing the one or more tokens received from the billing server, and a control unit for controlling transmission of the program purchase request message using at least one of the one or more tokens through the radio communication unit. | 01-29-2009 |
| 20110063329 | METHOD AND APPARATUS FOR SETTING NAVIGATION SCREEN UPDATE CYCLE IN A MOBILE TERMINAL - A method and an apparatus for setting a navigation screen update cycle in a mobile terminal are provided. In the method, at least one of a velocity of the mobile terminal and a map scale used by the mobile terminal is obtained. A screen update cycle is set with consideration of the at least one of the velocity and the map scale. A navigation screen display is updated according to the set screen update cycle. | 03-17-2011 |
Jun-Yong Kim, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090159952 | METHOD OF FABRICATING NON-VOLATILE MEMORY INTEGRATED CIRCUIT DEVICE AND NON-VOLATILE MEMORY INTEGRATED CIRCUIT DEVICE FABRICATED USING THE SAME - A method of fabricating a non-volatile memory integrated circuit device and a non-volatile memory integrated circuit device fabricated by using the method are provided. A device isolation region is formed in a substrate to define a cell array region and a peripheral circuit region. A plurality of first and second pre-stacked gate structures is formed in the cell array region, and each has a structure in which a lower structure, a conductive pattern and a first sacrificial layer pattern are stacked. Junction regions are formed in the cell array region. Spacers are formed on side walls of the first and second pre-stacked gate structures. A second sacrificial layer pattern filling each space between the second pre-stacked gate structures is formed. The first sacrificial layer pattern is removed from each of the first and second pre-stacked gate structures. A damascene metal layer pattern is formed in each of spaces of the first and second pre-stacked gate structures from which the first sacrificial layer pattern is removed, thus completing first and second stacked gate structures. The second sacrificial layer pattern is removed. A stop layer is formed on top surfaces of the first stacked gate structures, top surfaces and side walls of the second stacked gate structures, and a top surface of the substrate. | 06-25-2009 |
Jun-Yong Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100103743 | Flash memory device and method of testing the flash memory device - A flash memory device and a method of testing the flash memory device are provided. The flash memory device may include a memory cell array including a plurality of bit lines, a control unit configured to output estimated data and an input/output buffer unit including a plurality of page buffers. Each of the plurality of page buffers corresponds to one of the plurality of bit lines in the memory cell array and is configured to read test data programmed in at least a first page of a memory cell array, compare the read-out test data with the estimated data to determine whether the corresponding bit line is in a pass or failure state and output a test result signal. A voltage of the test result signal is maintained when test data of a second page of the memory cell array is read if the corresponding bit line in the first page is in a failure state. | 04-29-2010 |
| 20100208526 | Non-volatile memory device and method of operation therefor - In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line; and the de-coupling transistor is formed in the well. | 08-19-2010 |
Jun-Yong Park, Yongin-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110050083 | PLASMA DISPLAY PANEL - A plasma display panel (PDP) includes a front substrate and a rear substrate that face each other; a pair of base portions disposed between the front substrate and the rear substrate and are concavely indented in directions away from each other; a pair of barrier walls disposed on the pair of base portions to define a discharge cell; a scan electrode and a sustain electrode that generate a mutual discharge in the discharge cell; an address electrode to cross the scan electrode and that generates an address discharge together with the scan electrode; a phosphor layer disposed in the discharge cell; and a discharge gas injected into the discharge cell. | 03-03-2011 |
Jun-Yong Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090128035 | PLASMA DISPLAY PANEL - A plasma display panel (PDP) with improved address voltage margin and reduced noise brightness such as discharge light or background light during an address discharge. The PDP includes a plurality of barrier ribs between a front substrate and a rear substrate to define a plurality of main discharge spaces and a plurality of auxiliary discharge spaces along a stepped surface of the barrier ribs. The auxiliary discharge spaces provide a shorter discharge path than the main discharge spaces. Address electrodes are provided on the rear substrate for generating address discharges together with the scan electrodes on the front substrate at locations adjacent to the auxiliary discharge spaces. Phosphor layers are respectively formed in the main discharge spaces, and a discharge gas is injected in the main discharge spaces and the auxiliary discharge spaces. | 05-21-2009 |
| 20100007586 | PLASMA DISPLAY PANEL - A plasma display panel (PDP) is disclosed. In one embodiment, the PDP includes: i) first and second substrates facing each other, ii) a plurality of first barrier ribs formed between the first and second substrates and configured to define a plurality of discharge cells and iii) a plurality of second barrier ribs dividing each of the discharge cells into a first sub-discharge cell and a second sub-discharge cell, wherein a phosphor layer is formed in the first sub-discharge cells and is not formed in the second sub-discharge cells. According to one embodiment, the PDP has high driving efficiency obtained by improving an address voltage margin, and high image quality obtained by removing noise brightness caused by discharge light resulting from an address discharge, and is suitable for an image display with high efficiency and high resolution. | 01-14-2010 |
| 20100207916 | PLASMA DISPLAY PANEL - A plasma display panel (PDP) having high efficiency includes a front substrate and a rear substrate facing each other; element portions interposed between the front and rear substrates, and including a first element and a second element disposed in both sides of a main discharge space and a third and a fourth element respectively having a narrow width and protruding on the first element and the second element, wherein the first and second elements, and the third and fourth elements partition stepped spaces along a stepped surface in the main discharge space; sustain electrode pairs alternately disposed on the front substrate, extending along a first direction and causing mutual discharge; dielectric layers which are formed on the front substrate to cover the sustain electrode pairs and in which grooves are formed along a direction that is substantially perpendicular to the first direction; and address electrodes formed on the rear substrate and extending in a second direction that crosses the first direction. | 08-19-2010 |
Jun-Yong Song, Pyeongtaek-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100046919 | RECORDING PLAYBACK DEVICE IN IMAGE DISPLAY APPARATUS AND METHOD THEREOF - Provided are a recording playback device in an image display apparatus and a method thereof. In the recording playback method, at least one bookmark is received from a user during playback of a recording stored in an internal or external memory. The at least one bookmark is stored. The recording is played back from the bookmarked point by a user's request. | 02-25-2010 |
Jun-Yong Song, Buk-Gu KR
| Patent application number | Description | Published |
|---|---|---|
| 20100207928 | Gate Driving Circuit and Display Device Having the Gate Driving Circuit - A gate driving circuit includes a plurality of stages connected to each other. An m-th stage (‘m’ is a natural number) of the stages includes a pull-up part, a pull-down part, a first holding part and a second holding part. The pull-up part outputs a high voltage of a clock signal as a high voltage of an m-th gate signal in response to a high voltage applied to a first output control part. The pull-down part pulls down the high voltage of the m-th gate signal to a first low voltage in response to a high voltage of an (m+1)-th gate signal. The first holding part holds a voltage applied to the first output control part as a second low voltage having a level lower than the first low voltage. The second holding part holds a low voltage of the m-th gate signal to the first low voltage. | 08-19-2010 |
| 20110122117 | DISPLAY PANEL - A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal. | 05-26-2011 |
Jun-Yong Song, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20090257537 | DATA RECOVERY CIRCUIT OF SEMICONDUCTOR MEMORY APPARATUS THAT MINIMIZES JITTER DURING DATA TRANSMISSION - A data recovery circuit that minimizes jitter during data transmission is presented. The data recovery circuit includes a data dividing unit, a data sampling unit, a data selecting unit, and a data recovery unit. The data dividing unit is for dividing external data to generate multiple-division data. The data sampling unit is for sampling the multiple-division data at a first time and a second time to generate sampling data. The data selecting unit is for selecting one of the data sampled at the first time or the second time from the sampling data in accordance to whether the sampling data is transited to output the selected one as selection data. The data recovery unit is for recovering the selection data to internal data in the same logic level as the logic level of the external data. | 10-15-2009 |
Jun-Yong Zhang, Shenzhen City CN
| Patent application number | Description | Published |
|---|---|---|
| 20110083882 | CONDUCTIVE STRUCTURE AND METHOD OF MANUFACTURING THE SAME - The present disclosure relates to a conductive structure. The conductive structure includes a first conductive layer, a conductive unit, a circuit board and a conductive material. The conductive unit is disposed on the first conductive layer. The circuit board having a first through hole is disposed on the first conductive layer. The conductive unit is exposed to the first through hole. The first through hole is filled with a conductive material, such that the conductive material is electrically connected to the conductive unit. | 04-14-2011 |