| Patent application number | Description | Published |
|---|
| 20080250186 | BUS CONNECTING DEVICE FOR CONNECTING HOST WITH EXTERNAL DEVICE - A detecting unit detects a connection of an external device to a connection port and stores the connection in a bridge state storage unit. This setting is autonomously completed by a device before an initial configuration is started by a host. A data transfer unit receives initial configuration data of a link-connection bridge from the host. Data is transferred to the linked-uplink-connection bridge with reference to the bridge state storage unit, data to a bridge which is not linked up is wasted, or an Unsupported Request is returned to the host to represent the absence of the link-connection bridge. | 10-09-2008 |
| 20090051517 | Light emitter for vehicle and apparatus for alerting opening/closing of sliding door using the same - A light emitter for vehicle which can be easily mounted to a vehicle body, and an apparatus for alerting opening/closing of a sliding door using the same are provided. A light emitter for vehicle has an elongated base member. The base member is flexible, and has a recess formed in one surface side thereof along the longitudinal direction of the side. The recess has a bottom surface on which a flexible substrate is disposed with one end thereof being connected with a cable which is inserted into the base member from the tip end of the base member. The flexible substrate is provided with a resistor, a surge suppressor diode, and a plurality of LEDs arranged in line on the flexible substrate. The recess is filled with a transparent resin. The base member has an adhesive layer formed on the other surface side, with a release paper adhered to the adhesive layer. | 02-26-2009 |
| 20090059928 | COMMUNICATION APPARATUS, COMMUNICATION SYSTEM, ABSENT PACKET DETECTING METHOD AND ABSENT PACKET DETECTING PROGRAM - Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place. | 03-05-2009 |
| 20090201753 | Semiconductor memory device, control method therefor, and method for determining repair possibility of defective address - There are provided are a plurality of memory mats, a sub-word driver that accesses a normal memory cell irrespective of whether a row address to which access is requested is a defective address, a sub-word driver that accesses a redundant memory cell belonging to a memory mat different from the normal memory cell indicated by the row address, when the row address is a defective address. According to the present invention, the normal memory cell and a redundant memory cell belong to memory mats different to each other, and thus the normal memory cell can be accessed concurrently with determining operation of the repair determining circuit. | 08-13-2009 |
| 20090268534 | SEMICONDUCTOR MEMORY DEVICE AND TEST METHOD THEREOF - A semiconductor memory device comprises a memory cell array having memory cells arranged at intersections of word lines and bit lines, a first sense amplifier connected to a bit line at a predetermined position of the bit lines, a second sense amplifier connected to a bit line adjacent to the bit line at the predetermined position, a supplying circuit for supplying a predetermined voltage to each bit line connected to the first or second sense amplifier, and a sense amplifier control circuit capable of controlling the first and second sense amplifiers independently. In the semiconductor memory device, the sense amplifier control circuit performs a control in which an operation of either of the first and second sense amplifiers is stopped, the predetermined voltage is supplied to the bit line connected to the stopped sense amplifier, and the other of the first and second sense amplifiers is operated. | 10-29-2009 |
| 20100142246 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device comprises a plurality of memory cell mats, a plurality of sub-word driver regions and a plurality of sense amplifier regions, a plurality of intersection regions, a sub-amplifier, and a start signal (a control signal) supply circuit (a sub-amplifier control circuit). A plurality of sub-word driver regions and a plurality of sense amplifier regions are disposed adjacent to the plurality of memory cell mats. A plurality of intersection regions are intersection regions between the plurality of sub-word driver regions and the plurality of sense amplifier regions. The sub-amplifier is disposed in a first intersection region among the plurality of intersection regions. The start signal supply circuit is disposed in a second intersection region among the plurality of intersection regions, and supplies a start signal (a control signal) of the sub-amplifier to the sub-amplifier based on a sub-amplifier timing signal supplied from the extending direction of the sub-word driver region. | 06-10-2010 |
| 20100180062 | INTERNET CONNECTION SWITCH AND INTERNET CONNECTION SYSTEM | 07-15-2010 |
| 20110036829 | PLANAR HEATING ELEMENT OBTAINED USING DISPERSION OF FINE CARBON FIBERS IN WATER AND PROCESS FOR PRODUCING THE PLANAR HEATING ELEMENT - [Problems] To produce planar heating elements having high exothermic efficiency and provide energy-saving electric carpets, floor heating, wall surface heating appliances and heaters for thawing on roads and/or roofs or antifogging for mirrors. | 02-17-2011 |
| 20110064089 | PCI EXPRESS SWITCH, PCI EXPRESS SYSTEM, AND NETWORK CONTROL METHOD - Provided are a first PCI-PCI bridge that handles Multi Root to connect to a plurality of root complexes; a second PCI-PCI bridge that connects to an endpoint; a virtual PCI Express switch that performs a switching process between the first and second PCI-PCI bridges; and a network control device that transfers data that is to be processed in the virtual PCI Express switch to an external switch through a network without passing through a PCI-PCI bridge. | 03-17-2011 |
| 20110072182 | I/O CONNECTION SYSTEM, METHOD AND PROGRAM - In execution of hot-plug processing consisting of a plurality of processing steps for connecting an I/O to a host, the hot-plug processing is temporarily stopped upon completion of predetermined processing steps in the hot-plug processing, and the hot-plug processing is resumed once it is detected that connection between the host and the I/O has been established and the host has been enabled to access the I/O. | 03-24-2011 |
| 20110153906 | SWITCH AND NETWORK BRIDGE APPARATUS - A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register. | 06-23-2011 |
