| Patent application number | Description | Published |
|---|
| 20090014786 | Field Effect Transistors Having Protruded Active Regions and Methods of Fabricating Such Transistors - Provided are a field effect transistor, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor may have a structure in which a double gate field effect transistor and a recess channel array transistor are formed in a single transistor in order to improve a short channel effect which occurs as field effect transistors become more highly integrated, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor can exhibit stable device characteristics even when more highly integrated in such a manner that both the length and width of a channel increase and particularly the channel can be significantly long, and can be manufactured simply. | 01-15-2009 |
| 20100093167 | Methods of Fabricating Field Effect Transistors Having Protruded Active Regions - Provided are a field effect transistor, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor may have a structure in which a double gate field effect transistor and a recess channel array transistor are formed in a single transistor in order to improve a short channel effect which occurs as field effect transistors become more highly integrated, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor can exhibit stable device characteristics even when more highly integrated in such a manner that both the length and width of a channel increase and particularly the channel can be significantly long, and can be manufactured simply. | 04-15-2010 |
| 20110095345 | Methods of Fabricating Field Effect Transistors Having Protruded Active Regions - Provided are a field effect transistor, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor may have a structure in which a double gate field effect transistor and a recess channel array transistor are formed in a single transistor in order to improve a short channel effect which occurs as field effect transistors become more highly integrated, a method of manufacturing the same, and an electronic device including the field effect transistor. The field effect transistor can exhibit stable device characteristics even when more highly integrated in such a manner that both the length and width of a channel increase and particularly the channel can be significantly long, and can be manufactured simply. | 04-28-2011 |
| Patent application number | Description | Published |
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| 20100059807 | Semiconductor device having bar type active pattern - A semiconductor device having a bar type active pattern and a method of manufacturing the same are provided. The semiconductor device may include a semiconductor substrate having a semiconductor fin configured to protrude from a surface of the semiconductor substrate in a first direction, the semiconductor substrate having a first width and a second width crossing the first width, wherein the first width and the second width extend in a second direction. A plurality of active patterns may be arranged in the first direction with a separation gap from the semiconductor fin. A plurality of support patterns may be arranged between the semiconductor fin and one of the plurality of active patterns arranged closer to the semiconductor fin in the first direction, and between the plurality of active patterns arranged in the first direction to support the plurality of active patterns. A gate may be arranged to cross the plurality of active patterns in the second direction and to cover a portion of the at least one of the plurality of active patterns. | 03-11-2010 |
| 20100221921 | Methods of Forming Patterns in Semiconductor Devices - Methods of forming patterns in semiconductor devices are provided including forming first patterns spaced apart from one another on an object structure. A first sacrificial layer is formed conformally on the first patterns and the object structure. A second pattern is formed on a sidewall of the first sacrificial layer, the second pattern having a height smaller than that of the first pattern from an upper surface of the object structure. The first patterns are selectively removed to form an opening that exposes the object structure. A third pattern is formed on a sidewall of the opening. | 09-02-2010 |
| 20110006353 | DRAM DEVICES - A DRAM device includes a plug on a substrate, a conductive plate electrically connected to the plug and overlapping the substrate, at least one capacitor on the substrate and spaced apart from the plug, and at least one word line under the conductive plate and spaced apart from the conductive plate. The DRAM device further includes at least one first conductive pad under the conductive plate, the at least one first conductive pad being spaced apart from the conductive plate in a first state and being electrically connected to the conductive plate in a second state, the at least one first conductive pad being disposed between the plug and an adjacent word line of the at least one word line, and the at least one first conductive pad being electrically connected to a respective capacitor of the at least one capacitor. | 01-13-2011 |
