Patent application number | Description | Published |
20100055922 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device improves the variation in critical dimensions of neighboring patterns when employing a negative SPT process. The method includes forming an etch stop layer on an etch target layer, forming a first hard mask pattern on the etch stop layer, forming a spacer pattern on a sidewall of the first hard mask pattern, forming a second hard mask layer on an entire surface of a resultant structure including the spacer pattern, forming a second hard mask pattern by etching the second hard mask layer up to a height of the first hard mask pattern, removing the spacer pattern, and forming a pattern by etching the etch stop layer and the etch target layer using the first and the second hard mask patterns as an etch barrier. | 03-04-2010 |
20100248491 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING A DOUBLE PATTERNING PROCESS - A method for performing a double pattering process of a semiconductor device is provided. The method includes forming a hard mask layer having a stack structure of a first layer, a second layer and a third layer in sequence, forming a first photoresist pattern over the hard mask layer, etching the third layer to form third layer patterns by using the first photoresist pattern as an etch barrier, forming a second photoresist pattern over the third layer patterns, etching the second layer to form second layer patterns by using the second photoresist pattern and the third layer patterns as an etch barrier, removing the second photoresist pattern, and etching the first layer to form first layer patterns by using the second layer patterns as an etch barrier. | 09-30-2010 |
20110159693 | METHOD FOR FABRICATING HOLE PATTERN - A method for fabricating a hole pattern includes forming a first hard mask layer over an etch target layer, forming a second hard mask pattern over the first hard mask layer, which are patterned to be a line type in a first direction and have a selective etch ratio to the first hard mask layer, forming a third hard mask layer over the first hard mask layer to bury a space between adjacent ones of the second hard mask pattern, forming a photoresist pattern over the third hard mask layer, which is patterned to be a line type in a second direction; etching the third hard mask layer using the photoresist pattern to form a third hard mask pattern, removing the photoresist pattern, and etching the first hard mask layer using the second and third hard mask patterns. | 06-30-2011 |
20120009523 | METHOD FOR FORMING CONTACT HOLE OF SEMICONDUCTOR DEVICE - A method for forming a contact hole of a semiconductor device, includes forming a hard mask over an etch target layer, forming a first line pattern over the hard mask, forming a second line pattern over the hard mask and the first line pattern in a direction crossing the first line pattern, forming a mesh-type hard mask pattern by etching the hard mask using the first and second line patterns as etch barriers, and forming a contact hole by etching the etch target layer using the mesh-type hard mask pattern as an etch barrier. | 01-12-2012 |
20130037961 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device that may prevent an unexposed substrate and generation of bowing profile during a process for forming an open region having a high aspect ratio, and a method for fabricating the semiconductor device. The semiconductor device includes a first material layer formed over a substrate, an open region formed in the first material layer that exposes the first material layer, a second material layer formed on sidewalls of the open region, wherein the second material layer is a compound material including an element of the first material layer, and a conductive layer formed inside the open region. | 02-14-2013 |
20130328196 | SEMICONDUCTOR DEVICE WITH MULTI-LAYERED STORAGE NODE AND METHOD FOR FABRICATING THE SAME - A method for fabricating a semiconductor device includes forming a first dielectric structure over a second region of a substrate to expose a first region of the substrate, forming a barrier layer over an entire surface including the first dielectric structure, forming a second dielectric structure over the barrier layer in the first region, forming first open parts and second open parts in the first region and the second region, respectively, by etching the second dielectric structure, the barrier layer and the first dielectric structure, forming first conductive patterns filled in the first open parts and second conductive patterns filled in the second open parts, forming a protective layer to cover the second region, and removing the second dielectric structure. | 12-12-2013 |
20130337652 | MASK PATTERN FOR HOLE PATTERNING AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME - A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns. | 12-19-2013 |
20140057442 | SEMICONDUCTOR DEVICE WITH SILICON-CONTAINING HARD MASK AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a semiconductor substrate having an etch target layer provided on the surface thereof, and a hard mask layer formed over the etch target layer and including silicon, wherein the hard mask layer includes a dual structure including a first area and a second area having a larger etch rate than the first area, in order to increase an etching selectivity of the hard mask layer. | 02-27-2014 |
20140162453 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device that may prevent an unexposed substrate and generation of bowing profile during a process for forming an open region having a high aspect ratio, and a method for fabricating the semiconductor device. The semiconductor device includes a first material layer formed over a substrate, an open region formed in the first material layer that exposes the first material layer, a second material layer formed on sidewalls of the open region, wherein the second material layer is a compound material including an element of the first material layer, and a conductive layer formed inside the open region. | 06-12-2014 |
20140326408 | MASK PATTERN FOR HOLE PATTERNING AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME - A method for fabricating a semiconductor device includes forming an etching target layer over a substrate including a first region and a second region; forming a hard mask layer over the etching target layer; forming a first etch mask over the hard mask layer, wherein the first etch mask includes a plurality of line patterns and a sacrificial spacer layer formed over the line patterns; forming a second etch mask over the first etch mask, wherein the second etch mask includes a mesh type pattern and a blocking pattern covering the second region; removing the sacrificial spacer layer; forming hard mask layer patterns having a plurality of holes by etching the hard mask layer using the second etch mask and the first etch mask; and forming a plurality of hole patterns in the first region by etching the etching target layer using the hard mask layer patterns. | 11-06-2014 |