| Patent application number | Description | Published |
|---|
| 20100125702 | Non-Volatile Memory System and Access Method Thereof - Disclosed is a method for accessing a non-volatile memory device using a flash translation layer. The method includes receiving a write request for data from a file system and recording the data in the non-volatile memory device in response to the write request. The flash translation layer is informed whether a confirm mark for the data is recorded or not from the file system. | 05-20-2010 |
| 20100146193 | SYSTEM AND METHOD FOR CACHE SYNCHRONIZATION - A system for cache synchronization includes a data managing unit and a storage medium. The data managing unit is configured to control storing of data of a buffer cache of the storage medium, in response to an event signal received from a host, by classifying the data of the buffer cache into random data and sequential data. The storage medium includes a first area and a second area, and is configured to store the random data and an address information map in the first area, and to store the sequential data in the second area. | 06-10-2010 |
| 20100153628 | METHOD OF FABRICATING SYSTEMS INCLUDING HEAT-SENSITIVE MEMORY DEVICES - A system code is stored in a first nonvolatile memory. The first nonvolatile memory and a second nonvolatile memory are heated during assembly of an electronic device including the first nonvolatile memory and a second nonvolatile memory. The heating is to a temperature sufficient to change a state of at least some memory cells in the second nonvolatile memory device. After the heating, the system code stored in the first nonvolatile memory is copied into the second nonvolatile memory. The first nonvolatile memory may he less vulnerable to temperature-related data alteration than the second nonvolatile memory. For example, the first nonvolatile memory may include a NAND flash memory and the second nonvolatile memory may include a variable resistance memory. | 06-17-2010 |
| 20100174853 | USER DEVICE INCLUDING FLASH AND RANDOM WRITE CACHE AND METHOD WRITING DATA - A method of writing data to a flash memory in a system includes; receiving write data to be written in the flash memory, determining whether the received write data is random write data or sequential write data, if the received write data is sequential write data, then directly writing the received write data to the flash memory, and if the received write data is random write data, then writing the received write data to the random write cache, and flushing the random write data from the random write cache to the flash memory during idle periods for the flash memory. | 07-08-2010 |
| 20100195418 | SEMICONDUCTOR MEMORY DEVICE AND SYSTEM - Provided is a semiconductor memory device. The semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic receives write data to be written into first and second memory blocks of the first memory chip. If the first and second memory blocks are normal blocks, the control logic simultaneously performs a program operation for the first and second memory blocks. If one memory block of the first and second memory blocks is a bad block, the control logic writes the received write data corresponding to the one memory block into a storage circuit. | 08-05-2010 |
| 20100208521 | Nonvolatile memory device, method of operating nonvolatile memory device and memory system including nonvolatile memory device - The method of operating the nonvolatile memory device may include performing a read operation on a first address region, comparing a read time of the first address region with a reference time, and storing read data from the read from the first address region in a second address region based on the comparison result. | 08-19-2010 |
| 20100220526 | NONVOLATILE MEMORY DEVICE, SYSTEM, AND PROGRAMMING METHOD - A nonvolatile memory device stores program data in a first address area, determines whether the first address area is a most significant address area and whether the program data is reliable data, and upon determining that the first address area is not a most significant address area and that the program data is reliable data, additionally stores the program data in a second address area. | 09-02-2010 |
| 20110271041 | ELECTRONIC DEVICE COMPRISING FLASH MEMORY AND RELATED METHOD OF HANDLING PROGRAM FAILURES - A storage device performs a program operation to store program data in a selected memory block of a flash memory. The storage device allocates a reserved area of the flash memory as a free block upon detecting that a program failure has occurred in the program operation, reads the program data from a cache latch in a page buffer of the flash memory, copies valid data stored in the selected memory block to a first area of the free block, and reprograms the program data read from the cache latch to a second area of the free block. | 11-03-2011 |
