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Juenemann, OR
Dale Juenemann, Forest Grove, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110078475 | Transitioning a Computing Platform to a Low Power System State - A method which includes initiating a power management policy based on a processing element for a computing platform entering a given power state. The power management policy includes a determination as to whether an input/output (I/O) controller and a memory controller for the computing platform are substantially quiescent. The computing platform may then be transitioned to a low power system state from a run power system state based on a determination that both the I/O controller and the memory controller are substantially quiescent and an indication that the computing platform is capable of entering the low power system state. According to this method, the low power system state includes entering one or more devices responsive to the computing platform in a power level adequate to retain a configuration state that enables the one or more devices to transition back to the run power system state in a manner that is substantially transparent to an operating system for the computing platform. Other implementations and examples are also described in this disclosure. | 03-31-2011 |
Dale Juenemann, North Palins, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20100082904 | Apparatus and method to harden computer system - In some embodiments, a non-volatile cache memory may include a segmented non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the segmented non-volatile cache memory, wherein the controller is configured to control utilization of the segmented non-volatile cache memory. The segmented non-volatile cache memory may include a file cache segment, the file cache segment to store complete files in accordance with a file cache policy, and a block cache segment, the block cache segment to store one or more blocks of one or more files in accordance with a block cache policy, wherein the block cache policy is different from the file cache policy. The controller may be configured to utilize the file cache segment in accordance with information related to the block cache segment and to utilize the block cache segment in accordance with information related to the file cache segment. Other embodiments are disclosed and claimed. | 04-01-2010 |
Dale Juenemann, North Plains, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20090172048 | MEMORY STORAGE OF FILE FRAGMENTS - In some embodiments a beginning portion of a disk drive file fragment is stored in a memory, and the beginning portion of the disk drive file fragment is accessed from the memory. Other embodiments are described and claimed. | 07-02-2009 |
| 20090300280 | DETECTING DATA MINING PROCESSES TO INCREASE CACHING EFFICIENCY - Methods and apparatus to detect a data mining process are presented. In one embodiment the method comprising monitoring access of a process to a resource and classifying if the process is a data mining process based on at least one of a plurality of monitored values, such as an access rate, an eviction rate, and an I/O consumption value. | 12-03-2009 |
| 20090327584 | Apparatus and method for multi-level cache utilization - In some embodiments, a non-volatile cache memory may include a multi-level non-volatile cache memory configured to be located between a system memory and a mass storage device of an electronic system and a controller coupled to the multi-level non-volatile cache memory, wherein the controller is configured to control utilization of the multi-level non-volatile cache memory. Other embodiments are disclosed and claimed. | 12-31-2009 |
| 20090327607 | Apparatus and method for cache utilization - In some embodiments, an electronic system may include a cache located between a mass storage and a system memory, and code stored on the electronic system to prevent storage of stream data in the cache and to send the stream data directly between the system memory and the mass storage based on a comparison of first metadata of a first request for first information and pre-boot stream information stored in a previous boot context. Other embodiments are disclosed and claimed. | 12-31-2009 |
| 20100082906 | Apparatus and method for low touch cache management - In some embodiments, a processor-based system includes a processor, a system memory coupled to the processor, a mass storage device, a cache memory located between the system memory and the mass storage device, and code stored on the processor-based system to cause the processor-based system to utilize the cache memory. The code may be configured to cause the processor-based system to preferentially use only a selected size of the cache memory to store cache entries having less than or equal to a selected number of cache hits. Other embodiments are disclosed and claimed. | 04-01-2010 |
Dale J. Juenemann, North Plains, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20090070526 | USING EXPLICIT DISK BLOCK CACHEABILITY ATTRIBUTES TO ENHANCE I/O CACHING EFFICIENCY - A data caching method comprising identifying whether data stored in a first data block on a storage medium is cacheable; setting a first cacheability attribute associated with the first data block in a data structure to identify whether the data in the first data block is cacheable; monitoring I/O requests submitted for accessing target data in the first data block; determining whether the target data is cacheable based on the first cacheability attribute; and applying algorithms that implement cache policy to the target data, in response to determining that the target data is cacheable. | 03-12-2009 |
| 20100250834 | METHOD AND SYSTEM TO PERFORM CACHING BASED ON FILE-LEVEL HEURISTICS - A method and system to perform caching based at least on one or more file-level heuristics. The caching of a storage medium in a caching device is performed by a cache policy engine. The cache policy engine receives file-level information of input/output access of data of the storage medium and caches or evicts the data of the storage medium in the caching device based on the received file-level information. By utilizing information about the files and file operations associated with the disk sectors or logical block addresses of the storage medium, the cache policy engine can make a better decision on the data selection of the storage medium to be cached in or evicted from the caching device in one embodiment of the invention. Higher cache hit rates can be achieved and the performance of the system utilizing the cache policy engine is improved. | 09-30-2010 |
Milo J. Juenemann, Hillsboro, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20080244343 | STRUCTURAL TESTING USING BOUNDARY SCAN TECHNIQUES - A boundary scan technique to generate toggling waveform such as a square wave signal to perform structural testing is disclosed. An instr_extesttoggle command is provided that enables IEEE 1149.1 boundary scan cell to selectively generate the toggling signal on the pre-specified output pads of the integrated circuit. The frequency of the toggling signal may be controlled by the JTAG clock signal and the frequency of the toggling signal may be independent of the length of the boundary scan chain. Such an approach circumvents provisioning test points on the interconnects of a printed circuit board. | 10-02-2008 |