Patent application number | Description | Published |
20100043824 | MICROELECTRONIC SUBSTRATE CLEANING SYSTEMS WITH POLYELECTROLYTE AND ASSOCIATED METHODS - Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte. | 02-25-2010 |
20100295148 | METHODS OF UNIFORMLY REMOVING SILICON OXIDE AND AN INTERMEDIATE SEMICONDUCTOR DEVICE - A method of substantially uniformly removing silicon oxide is disclosed. The silicon oxide to be removed includes at least one cavity therein or more than one density or strain therein. The silicon oxide having at least one cavity or more than one density or strain is exposed to a gaseous mixture of NH | 11-25-2010 |
20110203940 | Method of Selectively Removing Conductive Material - An electrolyte solution, methods, and systems for selectively removing a conductive metal from a substrate are provided. The electrolyte solution comprising nanoparticles that are more noble than the conductive metal being removed, is applied to a substrate to remove the conductive metal selectively relative to a dielectric material without application of an external potential or contact of a processing pad with the surface of the substrate. The solutions and methods can be applied, for example, to remove a conductive metal layer (e.g., barrier metal) selectively relative to dielectric material and to a materially different conductive metal (e.g., copper interconnect) without application of an external potential or contact of a processing pad with the surface of the substrate. | 08-25-2011 |
20110291065 | PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS - Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material. | 12-01-2011 |
20120001144 | RESISTIVE RAM DEVICES AND METHODS - The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element. | 01-05-2012 |
20120097911 | PHASE CHANGE MEMORY CELL STRUCTURES AND METHODS - Phase change memory cell structures and methods are described herein. A number of methods of forming a phase change memory cell structure include forming a dielectric stack structure on a first electrode, wherein forming the dielectric stack structure includes creating a second region between a first region and a third region of the dielectric stack structure, the second region having a thermal conductivity different than a thermal conductivity of the first region and different than a thermal conductivity of the third region of the dielectric stack. One or more embodiments include forming a via through the first, second, and third regions of the dielectric stack structure, depositing a phase change material in the via, and forming a second electrode on the phase change material. | 04-26-2012 |
20120267599 | RESISTIVE RAM DEVICES AND METHODS - The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element. | 10-25-2012 |
20120298158 | MICROELECTRONIC SUBSTRATE CLEANING SYSTEMS WITH POLYELECTROLYTE AND ASSOCIATED METHODS - Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte. | 11-29-2012 |
20140319446 | RESISTIVE RAM DEVICES AND METHODS - The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One method of forming an RRAM device includes forming a resistive element having a metal-metal oxide interface. Forming the resistive element includes forming an insulative material over the first electrode, and forming a via in the insulative material. The via is conformally filled with a metal material, and the metal material is planarized to within the via. A portion of the metal material within the via is selectively treated to create a metal-metal oxide interface within the via. A second electrode is formed over the resistive element. | 10-30-2014 |