Patent application number | Description | Published |
20090021521 | Method Of And Apparatus For Encoding Data - An array of texture data elements (texels) is subdivided into a plurality of 8×4 texture element blocks, each of which 8×4 texture element blocks encodes two 4×4 texture element sub-blocks | 01-22-2009 |
20090195552 | Methods of and apparatus for processing computer graphics - When an alpha test is performed as part of the rendering process in a multisampled graphics processing pipeline, rather than taking the single alpha value initially defined for each fragment | 08-06-2009 |
20090195555 | Methods of and apparatus for processing computer graphics - In a graphics processing system, the left, right, top and bottom edge planes for the purposes of clipping are set to the maximum values that can be represented using floating-point format numbers, vertex positions are snapped to a grid of predefined vertex positions, and the precision of selected vertices is prioritised when deriving edge functions for a given primitive. | 08-06-2009 |
20090198893 | Microprocessor systems - A memory management arrangement includes a memory management unit | 08-06-2009 |
20090198969 | Microprocessor systems - A microprocessor pipeline arrangement | 08-06-2009 |
20090198972 | Microprocessor systems - A microprocessor pipeline arrangement 1 includes a plurality of functional units | 08-06-2009 |
20100026682 | GRAPHICS PROCESSING SYSTEMS - In a graphics processing system, when a fragment reaches a texturing stage, it is determined whether the texture to be applied is a static or dynamic texture (Step | 02-04-2010 |
20100060630 | GRAPHICS PROCESSING SYSTEMS - When rendering a scene | 03-11-2010 |
20100265259 | Generating and resolving pixel values within a graphics processing pipeline - A graphics processing apparatus | 10-21-2010 |
20110074765 | Graphics processing system - A transaction elimination hardware unit | 03-31-2011 |
20120078987 | Vector floating point argument reduction - A processing apparatus is provided with processing circuitry | 03-29-2012 |
20120079243 | Next-instruction-type-field - A graphics processing unit core | 03-29-2012 |
20120092451 | DIFFERENTIAL ENCODING USING A 3D GRAPHICS PROCESSOR - A 3D graphics rendering pipeline is used to carry out data comparisons for motion estimation in video data encoding. Video data for the pixel block of the video frame currently being encoded is loaded into the output buffers of the rendering pipeline. The video data for the comparison pixel blocks from the reference video frame is stored as texture map values in the texture cache of the rendering pipeline. Once the sets of pixel data for comparison have been stored, the rendering pipeline is controlled to render a primitive having fragment positions and texture coordinates corresponding to the data values that it is desired to compare. As each fragment is rendered, the stored and rendered fragment data is compared by fragment compare unit and the determined differences in the data values are accumulated in an error term register. | 04-19-2012 |
20120204006 | Embedded opcode within an intermediate value passed between instructions - A data processing system | 08-09-2012 |
20120215822 | Number format pre-conversion instructions - Apparatus for processing data includes processing circuitry | 08-23-2012 |
20120223946 | GRAPHICS PROCESSING - A graphics processor includes a vertex shader | 09-06-2012 |
20120223947 | GRAPHICS PROCESSING - A graphics processor includes a vertex shader | 09-06-2012 |
20120281005 | Method Of And Apparatus For Encoding And Decoding Data - Each block of texture data elements is encoded as a block of texture data that includes a set of integer values to be used to generate a set of base data values for the block, and a set of index values indicating how to use the base data values to generate data values for the texture data elements that the block represents. The integer values and the index values are both encoded in an encoded texture data block using a combination of base-n values, where n is greater than two, and base-2 values. Predefined bit representations are used to represent plural base-n values (n>2) collectively, and the bits of the bit representations representing the base-n values are interleaved with bits representing the base-2 values in the encoded texture data block. | 11-08-2012 |
20120281006 | Method Of And Apparatus For Encoding And Decoding Data - A texture map | 11-08-2012 |
20120281007 | Method Of And Apparatus For Encoding And Decoding Data - Each block of texture data elements is encoded as a block of texture data that includes: data indicating how to generate a set of data values to be used to generate data values for a set of the texture data elements that the block represents; data indicating a set of integer values to be used to generate the set of data values to be used to generate data values for a set of the texture data elements that the block represents; data indicating a set of index values indicating how to use the generated set of data values to generate data values for texture data elements of the set of texture data elements that the generated set of data values is to be used for; and data indicating the indexing scheme that has been used for the block. | 11-08-2012 |
20120281925 | Method Of And Apparatus For Encoding And Decoding Data - Each block of texture data elements is encoded as a block of texture data. The encoding process includes determining for each block of texture data elements whether the set of texture data elements of the block all have sufficiently similar data values. If they do, the extent of a region within the texture including the block in which every texture data element has sufficiently similar data values is then determined, and an encoded texture data block to represent the block of texture data elements that indicates that the block specifies a region within the texture in which every texture data element is to be allocated the same data value when decoded, and that includes data indicating the constant data value for the block and data indicating the extent of the region within the texture that the block relates to, is generated. | 11-08-2012 |
20120293545 | GRAPHICS PROCESSING SYSTEMS - In a tile-based graphics processing system, when an overlay image is to be rendered onto an existing image, the existing tile data for the existing image from the frame buffer in the main memory is pre-loaded into the local colour buffer of the graphics processor (step | 11-22-2012 |
20120303900 | PROCESSING PIPELINE CONTROL - A graphics processing unit | 11-29-2012 |
20130034309 | METHODS OF AND APPARATUS FOR ENCODING AND DECODING DATA IN DATA PROCESSING SYSTEMS - To encode and compress a data array | 02-07-2013 |
20130036290 | METHODS OF AND APPARATUS FOR STORING DATA IN MEMORY IN DATA PROCESSING SYSTEMS - A data array | 02-07-2013 |
20130076761 | GRAPHICS PROCESSING SYSTEMS - In a tile-based graphics processing system having plural rendering processors, the set of tiles | 03-28-2013 |
20130084018 | METHOD OF AND APPARATUS FOR ENCODING DATA - A graphics texture data encoding arrangement in which the texels in a texel block | 04-04-2013 |
20130106870 | MICROPROCESSOR SYSTEMS | 05-02-2013 |
20130141445 | METHODS OF AND APPARATUS FOR PROCESSING COMPUTER GRAPHICS - When carrying out a second, higher level of anti-aliasing such as 8× MSAA, in a graphics processing pipeline | 06-06-2013 |
20130155103 | INTERMEDIATE VALUE STORAGE WITHIN A GRAPHICS PROCESSING APPARATUS - A tile-based graphics processor includes tile processing circuitry that has both a tile buffer and a per-pixel general purpose data store. The per-pixel general purpose data store is read accessible and write accessible by the tile processing circuitry to store intermediate values. These intermediate values are generated by the tile processing circuitry and then consumed by the tile processing circuitry to generate the output values for the tile being processed. | 06-20-2013 |
20130195352 | METHODS OF AND APPARATUS FOR ENCODING AND DECODING DATA IN DATA PROCESSING SYSTEMS - To encode and compress a data array | 08-01-2013 |
20130198485 | METHODS OF AND APPARATUS FOR STORING DATA IN MEMORY IN DATA PROCESSING SYSTEMS - A data array | 08-01-2013 |
20130246496 | FLOATING-POINT VECTOR NORMALISATION - When performing vector normalisation upon floating point values, an approximate reciprocal value generating instruction is used to generate an approximate reciprocal value with a mantissa of one and an exponent given by a bitwise inversion of the exponent field of the input floating point number. A modified number of multiplication instruction is used which performs a multiplication giving the standard IEEE 754 results other than when a signed zero is multiplied by a signed infinity which results a signed predetermined substitute value, such as 2. The normalisation operation may be performed by calculating a scaling value in dependence upon the vector floating point value using the approximate reciprocal value generating instruction. Each of the input components may then be scaled using the modify multiplication instruction to generate a scaled vector floating point value formed of a plurality of scaled components. The magnitude of the scaled vector floating point value can then be calculated and each of the individual scaled components divided by this magnitude to generate a normalised vector floating point value. The scaling value may be set to 2, where C is an integer value selected such that the sum of the squares of the plurality of scale components is less than a predetermined limit value. | 09-19-2013 |
20130332939 | DATA PROCESSING APPARATUS AND METHOD FOR PROCESSING A RECEIVED WORKLOAD IN ORDER TO GENERATE RESULT DATA - A data processing apparatus and method are provided for processing a received workload in order to generate result data. A thread group generator generates from the received workload a plurality of thread groups to be executed to process the received workload. Each thread group consists of a plurality of threads, and at least one thread group has an inter-thread dependency existing between the plurality of threads. Each thread may be either an active thread whose output is required to form the result data, or a dummy thread required to resolve the inter-thread dependency for one of the active threads but whose output is not required to form the result data. The thread group generator identifies for each thread group any dummy thread within that thread group. A thread execution unit then executes each thread within a thread group received from the thread group generator by executing a predetermined program comprising a plurality of program instructions. Execution flow modification circuitry is responsive to the received thread group having at least one dummy thread, to cause the thread execution unit to selectively omit at least part of the execution of at least one of the plurality of instructions when executing each dummy thread, in dependence on control information associated with the predetermined program. In one particular embodiment the received workload is a graphics rendering workload and the thread execution unit performs graphics rendering operations in order to generate as the result data pixel values and associated control values. Such an approach can yield significant improvements in performance, as well as reducing power consumption. | 12-12-2013 |
20140152683 | METHODS OF AND APPARATUS FOR USING TEXTURES IN GRAPHICS PROCESSING SYSTEMS - A graphics virtual texturing system in which textures stored in a storage medium of a host system are divided into respective pages that are then loaded into a local memory of a graphics processing system for use. If the texture page that is required for performing a texturing operation at an originally desired level of detail ( | 06-05-2014 |
20140152684 | METHODS OF AND APPARATUS FOR USING TEXTURES IN GRAPHICS PROCESSING SYSTEMS - A graphics virtual texturing system in which textures stored in a storage medium of a host system are divided into respective pages that are then loaded into a local memory of a graphics processing system for use. Each page of a graphics texture has an associated fade factor value that can be set by an application that is to use the texture to control the contribution that the page will be used to make to any texturing result that is generated using the texture page in question. The graphics processing system then controls the contribution of texture data from a texture page to texturing result data to be generated in accordance with the fade factor value associated with the texture page in question. This allows texture paging to be done in a more visually pleasing manner than just a binary “page-is-here”/“page-is-not-here” switch. | 06-05-2014 |
20140168220 | HIDDEN SURFACE REMOVAL IN GRAPHICS PROCESSING SYSTEMS - The early depth test stages | 06-19-2014 |
20140176584 | REDUCING ENERGY AND INCREASING SPEED BY AN INSTRUCTION SUBSTITUTING SUBSEQUENT INSTRUCTIONS WITH SPECIFIC FUNCTION INSTRUCTION - A data processing system is used to evaluate a data processing function by executing a sequence of program instructions including an intermediate value generating instruction Inst | 06-26-2014 |
20140193081 | METHODS OF AND APPARATUS FOR ENCODING AND DECODING DATA - When encoding a set of texture data elements | 07-10-2014 |
20140267283 | METHODS OF AND APPARATUS FOR ENCODING AND DECODING DATA - To encode a texture to be used in a graphics processing system, the texture is first downscaled to generate a lower resolution representation of the texture | 09-18-2014 |
20140267377 | METHODS OF AND APPARATUS FOR PROCESSING COMPUTER GRAPHICS - A graphics processing pipeline determines whether respective graphics processing operations, such as respective blends, respective depth tests, etc., to be performed at a stage of the graphics processing pipeline would produce the same result for each sampling point of a set of plural sampling points represented by a fragment being processed by the graphics processing pipeline. If it is determined that respective graphics processing operations would produce the same result for each of the sampling points, then only a single instance of the graphics processing operation is performed and the result of that graphics processing operation is associated with each of the sampling points. The number of instances of the graphics processing operations needed to process the set of plural sampling points which the fragment represents is reduced in comparison to conventional multisampling graphics processing techniques which perform graphics processing operations for fragments on a “per sample” basis. The determination of whether or not the same result would be produced for each sampling point of the set of plural sampling points is facilitated by providing metadata which indicates whether or not fragment data and/or stored sample data for use when processing the sampling points is the same. | 09-18-2014 |
20140310507 | METHODS OF AND APPARATUS FOR MULTIDIMENSIONAL INDEXING IN MICROPROCESSOR SYSTEMS - When an OpenCL kernel is to be executed, a bitfield index representation to be used for the indices of the kernel invocations is determined based on the number of bits needed to represent the maximum value that will be needed for each index dimension for the kernel. A bitfield placement data structure | 10-16-2014 |
20140327671 | GRAPHICS PROCESSING SYSTEMS - A tile-based graphics processing pipeline | 11-06-2014 |
20140327688 | GRAPHICS PROCESSING SYSTEMS - A tile-based graphics processing pipeline comprising a rasteriser | 11-06-2014 |
20140354640 | HIDDEN SURFACE REMOVAL IN GRAPHICS PROCESSING SYSTEMS - A graphics processing pipeline | 12-04-2014 |
20140354644 | DATA PROCESSING SYSTEMS - A data processing system determines for a stream of instructions to be executed, whether there are any instructions that can be re-ordered in the instruction stream | 12-04-2014 |
20140354670 | RASTERISATION IN GRAPHICS PROCESSING SYSTEMS - A rasteriser | 12-04-2014 |
20140354682 | METHOD OF AND APPARATUS FOR PROCESSING GRAPHICS - A tile-based graphics processing pipeline that uses primitive lists that can encompass plural rendering tiles includes a primitive list reading unit that reads primitive lists for a tile being rendered to determine primitives to be processed for the tile and a rasteriser that rasterises input primitives to generate graphics fragments to be processed. The pipeline further comprises a comparison unit between the primitive list reading unit and the rasteriser that for primitives that have been read from primitive lists that include plural rendering tiles, compares the location of the primitive in the render target to the location of the tile being rendered, and then either sends the primitive onwards to the rasteriser if the comparison determines that the primitive could lie at least partially within the tile, or does not send the primitive to the rasteriser if the comparison determines that the primitive definitely does not lie within the tile. | 12-04-2014 |
20140366033 | DATA PROCESSING SYSTEMS - When an atomic operation is to be executed for a thread group by an execution stage of a data processing system, it is determined whether there is a set of threads for which the atomic operation for the threads accesses the same memory location. If so, the arithmetic operation for the atomic operation is performed for the first thread in the set of threads using an identity value for the arithmetic operation for the atomic operation and the first thread's register value for the atomic operation, and is performed for each other thread in the set of threads using the thread's register value for the atomic operation and the result of the arithmetic operation for the preceding thread in the set of threads, to thereby generate for the final thread in the identified set of threads a combined result of the arithmetic operation for the set of threads. | 12-11-2014 |
20140368521 | GRAPHICS PROCESSING SYSTEMS - A tile-based graphics processing pipeline comprising a rasteriser | 12-18-2014 |
20140372731 | DATA PROCESSING SYSTEMS - A data processing system includes an execution pipeline that includes one or more programmable execution stages which execute execution threads to execute instructions to perform data processing operations. Instructions to be executed by a group of execution threads are first fetched into an instruction cache and then read from the instruction cache for execution by the thread group. When an instruction to be executed by a thread group is present in a cache line in the instruction cache, or is to be fetched into an allocated cache line in the instruction cache, a pointer to the location of the instruction in the instruction cache is stored for the thread group. This stored pointer is then used to retrieve the instruction for execution by the thread group from the instruction cache. | 12-18-2014 |
20150046655 | DATA PROCESSING SYSTEMS - A data processing system includes one or more processors | 02-12-2015 |
20150062154 | GRAPHICS PROCESSING SYSTEMS - When processing a set of tiles to generate an output in a tile based graphics processing pipeline, the pipeline, for one or more tiles of the set of tiles, renders one or more render targets containing data to be used in a processing operation ( | 03-05-2015 |