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Joon-Seok

Joon Seok Oh, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20090283908METAL LINE OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and a metal line forming region is formed in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer, and the diffusion layer has a multi-layered structure of an Ru layer, an Ru11-19-2009
20100019386ELECTRICAL CONDUCTOR LINE HAVING A MULTILAYER DIFFUSION BARRIER FOR USE IN A SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - An electrical conductor having a multilayer diffusion barrier of use in a resultant semiconductor device is presented. The electrical conductor line includes an insulation layer, a diffusion barrier, and a metal line. The insulation layer is formed on a semiconductor substrate and having a metal line forming region. The diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and has a multi-layered structure made of TaN layer, an Mo01-28-2010
20100052167METAL LINE HAVING A MOxSiy/Mo DIFFUSION BARRIER OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A metal line having a Mo03-04-2010
20100052168METAL LINE HAVING A MULTI-LAYERED DIFFUSION LAYER IN A SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME - A metal line having a multi-layered diffusion layer in a resultant semiconductor device is presented along with corresponding methods of forming the same. The metal line includes an insulation layer, a multi-layered diffusion barrier, and a metal layer. The insulation layer is formed on a semiconductor substrate and has a metal line forming region. The multi-layered diffusion barrier is formed on a surface of the metal line forming region defined in the insulation layer. The diffusion barrier includes a VB03-04-2010
20100052169METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER AND METHOD FOR FORMING THE SAME - An insulation layer is formed on a semiconductor substrate so as to define a metal line forming region. A diffusion barrier having a multi-layered structure of an Mo03-04-2010
20100166982METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER AND METHOD FOR FORMING THE SAME - A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer has a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier includes a stack structure including an Mo07-01-2010

Joon Seok Park, Yongin-Si KR

Patent application numberDescriptionPublished
20100063285ANTIFUNGAL TRIAZOLE DERIVATIVES, METHOD FOR THE PREPARATION THEREOF AND PHARMACEUTICAL COMPOSITION CONTAINING SAME - The present invention relates to triazole derivaties, a method for the preparation thereof, and a pharmaceutical composition containing the same as an active ingredient. The inventive triazole derivaties have an excellent antifungal activity against various pathogens.03-11-2010

Joon Seok Park, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080287440Novel Antifungal Triazole Derivatives - Disclosed herein are antifungal triazole derivatives or pharmaceutically acceptable salts thereof, a preparation method thereof, and a pharmaceutical composition comprising the same. The triazole derivatives of Chemical Formula 1 or pharmaceutically acceptable salts thereof according to the present invention have excellent inhibitory activity against a broad spectrum of fungi, in addition to being safe to the body, and thus are very useful in the treatment and prevention of fungal infection.11-20-2008

Joon-Seok Moon, Seoul KR

Patent application numberDescriptionPublished
20090186471METHOD OF FABRICATING SEMICONDUCTOR DEVICE FOR REDUCING THERMAL BURDEN ON IMPURITY REGIONS OF PERIPHERAL CIRCUIT REGION - A method of fabricating a semiconductor device for reducing a thermal burden on impurity regions of a peripheral circuit region includes preparing a substrate including a cell active region in a cell array region and peripheral active regions in a peripheral circuit region. A cell gate pattern and peripheral gate patterns may be formed on the cell active region and the peripheral active regions. First cell impurity regions may be formed in the cell active region. A first insulating layer and a sacrificial insulating layer may be formed to surround the cell gate pattern and the peripheral gate patterns. Cell conductive pads may be formed in the first insulating layer to electrically connect the first cell impurity regions. The sacrificial insulating layer may be removed adjacent to the peripheral gate patterns. First and second peripheral impurity regions may be sequentially formed in the peripheral active regions adjacent to the peripheral gate patterns.07-23-2009
20100019302SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor device and a method of manufacturing the same, a substrate is defined into active and non-active regions by a device isolation layer and a recessed portion is formed on the active region. A gate electrode includes a gate insulation layer on an inner sidewall and a bottom of the recessed portion, a lower electrode on the gate insulation layer and an inner spacer on the lower electrode in the recessed portion, and an upper electrode that is positioned on the inner spacer and connected to the lower electrode. Source and drain impurity regions are formed at surface portions of the active region of the substrate adjacent to the upper electrode. Accordingly, the source and drain impurity regions are electrically insulated by the inner spacer in the recessed portion of the substrate like a bridge, to thereby sufficiently prevent gate-induced drain leakage (GIDL) at the gate electrode.01-28-2010
20110053327METHOD OF FORMING RECESS AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING THE SAME - Example embodiments relate to a method of forming a recess and a method of manufacturing a semiconductor device having the same. The method includes forming a field region defining an active region in a substrate. The active region extends in a first direction in the substrate. The method further includes forming a preliminary recess extending in a second direction different from the first direction and crossing the active region in the substrate, plasma-oxidizing the substrate to form a sacrificial oxide layer along a surface of the substrate having the preliminary recess, and removing portions of the sacrificial oxide layer and the active region by plasma etching to form a recess having a width larger than a width of the preliminary recess, where an etch rate of the active region is one to two times greater than an etch rate of the sacrificial oxide layer.03-03-2011

Patent applications by Joon-Seok Moon, Seoul KR

Joon-Seok Oh, Seoul KR

Patent application numberDescriptionPublished
20080286684COATING MATERIAL FOR PHOTORESIST PATTERN AND METHOD OF FORMING FINE PATTERN USING THE SAME - A coating material for a photoresist pattern includes a water-soluble polymer and an additive mixed with the water-soluble polymer. The additive may be at least one selected from the group represented by Formulas 1 and 2:11-20-2008
20090137776Process for producing poly-tetrahydrofuran - The present invention relates to a process for producing tetrahydrofuran polymer or tetrahydrofuran copolymer by using heteropolyacid catalyst, and more particularly, to a process for producing tetrahydrofuran polymer by using hydronium ion water having a pH of 5.5 or less as a reaction initiator in the initiation step.05-28-2009

Joon-Seok Yoon, Seoul KR

Patent application numberDescriptionPublished
20080197659Sunvisor of a Vehicle - As of supporting the survivor to the vehicle body, the visor panel is adapted in relatively and easily be attached to and detached from the clip unit by using a push lock type clip unit. Moreover, when the support rod is detached from the clip unit, the visor panel is automatically positioned to shade the side window via a panel guide unit, thus optimizing the convenience of using the sunvisor.08-21-2008