| Patent application number | Description | Published |
| 20100173479 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS OF FORMING VARIABLE RESISTANCE MEMORY DEVICES - Provided are variable resistance memory devices and methods of forming the variable resistance memory devices. The methods can include forming an etch stop layer on an electrode, forming a molding layer on the etch stop layer, forming a recess region including a lower part having a first width and an upper part having a second width by recessing the etch stop layer and the molding layer, and forming a layer of variable resistance material in the recess region. | 07-08-2010 |
| 20100181549 | Phase-Changeable Random Access Memory Devices Including Barrier Layers and Metal Silicide Layers - A PRAM device may include an insulating interlayer, a diode, a metal silicide layer, a barrier spacer, an outer spacer, a lower electrode, a phase-changeable layer and an upper electrode. The insulating interlayer may be formed on a substrate. The insulating interlayer may have a contact hole. The diode may be formed in the contact hole. The metal silicide layer may be formed on the diode. The barrier spacer may be formed on an upper surface of the metal silicide layer and a side surface of the contact hole. The outer spacer may be formed on the barrier spacer. The lower electrode may be formed on the barrier spacer. The phase-changeable layer may be formed on the lower electrode. The upper electrode may be formed on the phase-changeable layer. | 07-22-2010 |
| 20110188292 | VARIABLE RESISTANCE MEMORY, OPERATING METHOD AND SYSTEM - Provided is an operating method of a variable resistance memory device. The operating method applies a set pulse to a plurality of memory cells to be written in a set state, and applies a reset pulse to a plurality of memory cells to be written in a reset state. The width of the set pulse is narrower than the width of the reset pulse. | 08-04-2011 |
| 20110248235 | VARIABLE RESISTANCE MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - A nonvolatile memory device includes a substrate and a first insulating layer on the substrate. The first insulating layer includes a first opening therein. A lower electrode is provided in the first opening and protrudes from a surface of the first insulating layer outside the first opening. An electrode passivation pattern is provided on a sidewall of the lower electrode that protrudes from the surface of the first insulating layer. A second insulating layer is provided on the first insulating layer and includes a second opening therein at least partially exposing the lower electrode. A variable resistance material layer extends into the second opening to contact the lower electrode. The electrode passivation layer electrically separates the sidewall of the lower electrode from the variable resistance material layer. The electrode passivation pattern is formed of a material having an etching selectivity to that of the second insulating layer. Related fabrication methods are also discussed. | 10-13-2011 |
| 20110263093 | Methods of Forming Variable-Resistance Memory Devices and Devices Formed Thereby - Methods of forming a variable-resistance memory device include patterning an interlayer dielectric layer to define an opening therein that exposes a bottom electrode of a variable-resistance memory cell, on a memory cell region of a substrate (e.g., semiconductor substrate). These methods further include depositing a layer of variable-resistance material (e.g., phase-changeable material) onto the exposed bottom electrode in the opening and onto a first portion of the interlayer dielectric layer extending opposite a peripheral circuit region of the substrate. The layer of variable-resistance material and the first portion of the interlayer dielectric layer are then selectively etched in sequence to define a recess in the interlayer dielectric layer. The layer of variable-resistance material and the interlayer dielectric layer are then planarized to define a variable-resistance pattern within the opening. | 10-27-2011 |
| Patent application number | Description | Published |
| 20090024538 | METHOD FOR PROVIDING STOCK INFORMATION AND BROADCAST RECEIVING APPARATUS USING THE SAME - A method for providing stock information and a broadcast receiving apparatus using the method are provided. According to the method for providing stock information, stock information is received according to the RSS protocol, and the received information is displayed as display information on a display of the broadcast receiving apparatus. | 01-22-2009 |
| 20110115698 | DISPLAY APPARATUS, TERMINAL, AND IMAGE DISPLAY METHOD - A display apparatus includes a display unit; a communication unit which communicates with a terminal which displays a personal image provided to the terminal, the terminal being one of a plurality of terminals; and a controller controls the display unit to display a sharing image shared among users of the plurality of terminals on the display unit and changes the sharing image displayed on the display unit in accordance with an input received from the terminal. Accordingly, there is provided a display apparatus which provides a video interface including a sharing image and a personal image, a terminal and an image display method. | 05-19-2011 |
| 20110115818 | DISPLAY APPARATUS, CLIENT, IMAGE DISPLAY SYSTEM INCLUDING THE SAME, AND IMAGE DISPLAYING METHOD - Disclosed are a display apparatus, a client, an image display system including the same, and an image display method. The display apparatus includes a communication unit which communicates with at least one client; and a controller which receives server software for displaying a sharing image and at least one personal image from an exterior server, and executes the server software so that the sharing image is displayed on one of the display unit and the at least one client and the at least one personal image is displayed on the other of the display unit and the at least one client. | 05-19-2011 |
| Patent application number | Description | Published |
| 20120098799 | DISPLAY APPARATUS - A display apparatus includes a first substrate, a second substrate with a liquid crystal layer disposed between the first and second substrates, a first spacer, and a second spacer. The first substrate includes a display area and a peripheral area. The first spacer is arranged in the peripheral area to maintain a distance between the first and second substrates, and the second spacer is arranged in the display area. A driving circuit includes a first signal line, a second signal line insulated from the first signal line, a protective layer, and a bridge electrode. The protective layer has a first contact hole exposing a portion of the first and second signal lines. The peripheral area includes a contact area corresponding to the first contact hole and a non-contact area proximal to the contact area. The first spacer is disposed in the non-contact area. | 04-26-2012 |
| 20120099042 | THIN FILM TRANSISTOR ARRAY PANEL, LIQUID CRYSTAL DISPLAY, AND MANUFACTURING METHOD THEREOF - Provided are a thin film transistor display panel, a liquid crystal display, and a manufacturing method therefor, that can prevent errors or omissions in rubbing due to a step between a pixel electrode and a data line, and the resulting light leakage, as well as increase the effective area ratio of a spacer and prevent shorts from occurring during at least some repair processes. The thin film transistor array panel includes: a first substrate; a gate line and a data line formed on the first substrate; a step preventing member formed on the data line to at least partially fill a volume positioned between the data line and a pixel electrode; and a spacer formed on the first substrate, wherein the spacer and the step preventing member comprise the same material. | 04-26-2012 |