Patent application number | Description | Published |
20080247212 | MEMORY SYSTEM HAVING POINT-TO-POINT (PTP) AND POINT-TO-TWO-POINT (PTTP) LINKS BETWEEN DEVICES - A memory system has first and second primary memories and first and second secondary memories coupled to the first and second primary memories, respectively, the coupling comprising at least one point-to-point connection. A memory module includes at least two of the first and second primary and first and second secondary memories. A first connection element, such as a connector or solder, connects the memory module to a mother board. A second connection element, such as a connector or solder, connects at least one other of the first and second primary and first and second secondary memories to the mother board. At least one of the memories on the first memory module is coupled to at least one of the other memories. The memory system also includes a memory controller which is connected to the primary memories by a point-to-two-point link. | 10-09-2008 |
20090037800 | DATA PARALLELIZING RECEIVER - Provided is a data parallelizing receiver including an input signal receiver for externally receiving serial data as packets, sampling the serial data, aligning the sampled data in an input order, and converting the aligned data into parallel data to output the parallel data, a cyclic redundancy check (CRC) partial calculator for receiving the parallel data, classifying the parallel data into groups according to the input order, and performing a partial CRC calculation on each of the groups to sequentially output a plurality of partial CRC calculation results, and a CRC partial calculation merger for receiving the plurality of partial CRC calculation results and merging the partial CRC calculation results to output CRC calculation data. | 02-05-2009 |
20100142252 | RECONFIGURABLE INPUT/OUTPUT IN HIERARCHICAL MEMORY LINK - A memory system and memory module includes a plurality of memory devices, each having a plurality, e.g. four, ports for transmitting and receiving command signals, write data signals and read data signals. One of the memory devices is connected to a host or controller, and the remaining memories are connected together, typically by point-to-point links. When the memory system configuration is such that at least one of the ports in at least one of the memory devices is not used, one or more other ports can use the pins that may otherwise have been used by the unused ports. As a result, a set of reconfigurable, shared pins is defined in which two ports share the pins. The port that is not being used in a particular application for the memory device is not connected to the shared pins, and another port that is being used in the application is connected to the shared pins. This allows for the used of fewer package pins and, consequently, reduced package size. | 06-10-2010 |
20110246857 | MEMORY SYSTEM AND METHOD - A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel. | 10-06-2011 |
20110289269 | MEMORY SYSTEM AND METHOD HAVING POINT-TO-POINT LINK - A memory system includes a controller for generating a control signal and a primary memory for receiving the control signal from the controller. A secondary memory is coupled to the primary memory, the secondary memory being adapted to receive the control signal from the primary memory. The control signal defines a background operation to be performed by one of the primary and secondary memories and a foreground operation to be performed by the other of the primary and secondary memories. The primary memory and the secondary memory are connected by a point-to-point link. At least one of the links between the primary and secondary memories can be an at least partially serialized link. At least one of the primary and secondary memories can include an on-board internal cache memory. | 11-24-2011 |
20120059984 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor package is disclosed. The semiconductor package includes a package interface, a stack of semiconductor chips, a plurality of stacks of through substrate vias, and an interface circuit. The package interface includes at least a first pair of terminals. Each stack of through substrate vias includes plural through substrate vias of respective ones of the semiconductor chips, each through substrate via electrically connected to a through substrate via of an immediately adjacent semiconductor chip. The interface circuit includes an input connected to the first pair of terminals to receive a differential signal providing first information, and includes an output to provide an output signal including the first information in a single-ended signal format to at least one of the plurality of stacks of through substrate vias. | 03-08-2012 |
20120099389 | MEMORY CIRCUITS, SYSTEMS, AND MODULES FOR PERFORMING DRAM REFRESH OPERATIONS AND METHODS OF OPERATING THE SAME - A memory module can include a plurality of dynamic memory devices that each can include a dynamic memory cell array with respective regions therein, where the plurality of dynamic memory devices can be configured to operate the respective regions responsive to a command. A DRAM management unit can be on the module and coupled to the plurality of dynamic memory devices, and can include a memory device operational parameter storage circuit that is configured to store memory device operational parameters for the respective regions to affect operation of the respective regions responsive to the command. | 04-26-2012 |
20120280731 | PHASE-LOCKED-LOOP CIRCUIT INCLUDING DIGITALLY-CONTROLLED OSCILLATOR - A phase-locked-loop (PLL) circuit is provided. The PLL circuit includes a phase/frequency detector, a digital filter, a digital low pass filter (LPF), a digitally controlled oscillator (DCO), and a frequency divider. The digital LPF performs a low-pass-filtering on least significant bits of first digital data in a digital mode and generates filtered second digital data. The DCO performs a digital-to-analog conversion on the second digital data and most significant bits of the first digital data to generate a first signal, generates an oscillation control signal based on the first signal, and generates an output clock signal oscillating in response to the oscillation control signal. | 11-08-2012 |
20120300555 | INTEGRATED CIRCUIT MEMORY DEVICE - A semiconductor memory device includes a plurality of memory regions formed on one chip, each of the memory regions having a plurality of volatile memory cells that are formed with a density or capacity of 2̂K bits, where K is an integer greater than or equal to 0, and a plurality of input/output (I/O) terminals for inputting and outputting data of the volatile memory cells, and at least one peripheral region that controls a write operation for writing data into the memory regions and a read operation for reading data from the memory regions based on a command and an address input from outside. Thus, a total or entire density of the memory regions corresponds to a non-standard (or ‘interim’) density so that the semiconductor memory device may have an interim density. | 11-29-2012 |
20120300568 | Method of Refreshing a Memory Device, Refresh Address Generator and Memory Device - A refresh address is generated with a refresh period for refreshing a memory device with refresh leveraging. A respective refresh is performed on a weak cell having a first address when the refresh address is a second address instead of on a first strong cell having the second address. A respective refresh is performed on one of the first strong cell or a second strong cell having a third address when the refresh address is the third address. Address information is stored for only one of the first, second, and third addresses such that memory capacity may be reduced. In alternative aspects, a respective refresh is performed on one of a weak cell, a first strong cell, or a second strong cell depending on a flag when the refresh address is any of at least one predetermined address to result in refresh leveraging. | 11-29-2012 |
20120303870 | MEMORY CHIP, MEMORY SYSTEM, AND METHOD OF ACCESSING THE MEMORY CHIP - A memory chip, a memory system, and a method of accessing the memory chip. The memory chip includes a substrate, a first storage unit, and a second storage unit. The first storage unit includes a plurality of first memory cells may have a first storage capacity of 2 | 11-29-2012 |
20130016574 | SEMICONDUCTOR MEMORY DEVICE HAVING IMPROVED REFRESH CHARACTERISTICS - A semiconductor memory device having improved refresh characteristics includes a memory array including a plurality of memory cells; a test unit configured to test refresh characteristics of the memory array and generate a first fail address signal; a storage unit configured to store the first fail address signal; and a refresh unit configured to perform a refresh operation on the memory array, wherein the refresh unit is configured to receive the first fail address signal from the storage unit, perform the refresh operation on a first memory cell that does not correspond to the first fail address signal according to a first period, and perform the refresh operation on a second memory cell that corresponds to the first fail address signal according to a second period that is shorter than the first period. | 01-17-2013 |
20130055048 | BAD PAGE MANAGEMENT IN MEMORY DEVICE OR SYSTEM - A memory device comprises a memory cell array and a bad page map. The memory cell array comprises a plurality of memory cells arranged in pages and columns, wherein the memory cell array is divided into a first memory block and a second memory block each corresponding to an array of the memory cells. The bad page map stores bad page location information indicating whether each of the pages of the first memory block is good or bad. A fail page address of the first memory block is replaced by a pass page address of the second memory block according to the bad page location information. | 02-28-2013 |
20130058145 | MEMORY SYSTEM - A semiconductor device includes a first memory region including a plurality of memory cells; a test unit configured to test the first memory region, and detect a weak bit from among the plurality of memory cells; and a second memory region configured to store a weak bit address (WBA) of the first memory region, and data intended to be stored in the weak bit, wherein the first memory region and the second memory region include different types of memory cells. | 03-07-2013 |
20130170274 | SEMICONDUCTOR MEMORY DEVICE STORING MEMORY CHARACTERISTIC INFORMATION, MEMORY MODULE AND MEMORY SYSTEM HAVING THE SAME, AND OPERATING METHOD THEREOF - A semiconductor memory device includes a cell array including a plurality of regions accessed by first addresses, where the plurality of regions including at least two groups of regions having respectively different memory characteristics. The device further includes a nonvolatile array for nonvolatile storage of group information indicative of which of the least two groups each of the plurality of regions belongs. | 07-04-2013 |
20140019833 | MEMORY SYSTEM AND METHOD - A memory system includes a memory controller and a memory device. The memory device exchanges data through a first channel with the memory controller, exchanges a first cyclic redundancy check (CRC) code associated with the data through a second channel with the memory controller, and receives a command/address packet including a second CRC code associated with a command/address from the memory controller through a third channel. | 01-16-2014 |
Patent application number | Description | Published |
20100020035 | MOBILE TERMINAL AND EVENT CONTROL METHOD THEREOF - Disclosed is an event control method of a mobile terminal, in which when a touch input is detected, a shape and size of a lock screen is changed according to the detected touch input value (e.g., touch time, the number of touch times or touch area) and simultaneously a threshold value necessary for unlocking the lock screen | 01-28-2010 |
20100023858 | MOBILE TERMINAL AND METHOD FOR DISPLAYING INFORMATION LIST THEREOF - A mobile terminal including a display unit including a touch screen, a memory unit configured to store data, a receiving unit configured to receive an input command to view requested stored data on the display unit of the mobile terminal, and a controller configured to classify the requested stored data into at least first and second categories of data, each category of data including a common type of data, to control the display unit to display the at least first and second categories of data in lists that are parallel with each other, and to individually and separately control the lists of the first and second categories of data based on a touching action performed on one of lists of the first and second categories of data. | 01-28-2010 |
20140333421 | REMOTE CONTROL DEVICE, DISPLAY APPARATUS, AND METHOD FOR CONTROLLING THE REMOTE CONTROL DEVICE AND THE DISPLAY APPARATUS THEREOF - A remote control device, a display apparatus and a method for controlling the remote control device and the display apparatus thereof are provided. A remote control device for controlling a display apparatus includes a user interface configured to receive a user interaction, a first communicator configured to communicate with the display apparatus and receive an image, a display, and a controller configured to, in response to a first interaction being input through the user interface, control the display to display at least one image of a plurality of images received from the display apparatus, and in response to an object included in the at least one displayed image being selected according to a second interaction input through the user interface and a graphic user interface (GUI) being selected through the user interface, retrieve information related to the selected object, and display the information related to the selected object. | 11-13-2014 |
20140333422 | DISPLAY APPARATUS AND METHOD OF PROVIDING A USER INTERFACE THEREOF - A display apparatus and a UI providing method are disclosed. The display apparatus includes a display configured to display a plurality of screens on a first area of a display screen and a plurality of objects categorized into a plurality of groups on a second area of the display screen, a user interface configured to detect a user interaction, and a controller configured to control the display to reproduce a content which corresponds to the selected object according to the predetermined user interaction on one of the plurality of screens in response to a predetermined user interaction being detected through a user interface while one object is selected among the plurality of objects. | 11-13-2014 |
20140333531 | DISPLAY APPARATUS WITH A PLURALITY OF SCREENS AND METHOD OF CONTROLLING THE SAME - A display apparatus and a control method thereof are provided. The display apparatus includes a display configured to display a plurality of images received from a plurality of sources on each of a first screen, a second screen, and a third screen of a display screen, a user interface configured to detect a user interaction, and a controller configured to control the display to move locations of the first to third screens in accordance with a detected rotation interaction in response to the rotation interaction being detected through the user interface. | 11-13-2014 |
20140333671 | DISPLAY APPARATUS AND CONTROL METHOD THEREOF - A display apparatus and a method for controlling a display apparatus are provided. A display apparatus includes a display configured to display an image, a rotator configured to rotate the display, and a controller configured to control the rotator to rotate the display when a predetermined event occurs, and control the display to generate a plurality of screens on the rotated display, display a first image on one of the plurality of screens, and display at least one different image on another screen among the plurality of screens. | 11-13-2014 |
20140337749 | DISPLAY APPARATUS AND GRAPHIC USER INTERFACE SCREEN PROVIDING METHOD THEREOF - A display apparatus includes a display configured to display a GUI screen including a plurality of regions, a user interface configured to receive a user interaction with respect to the GUI screen, and a controller configured to control the display to display a region corresponding to the user interaction among the plurality of regions as a main region by rotating the GUI screen, and configured to perform a control operation mapped to the main region, wherein the main region is a region that occupies the GUI screen at a predetermined ratio or more. | 11-13-2014 |
20140337773 | DISPLAY APPARATUS AND DISPLAY METHOD FOR DISPLAYING A POLYHEDRAL GRAPHICAL USER INTERFACE - A display apparatus for displaying content-related information as a polyhedral graphical user interface (GUI) is provided. The display apparatus includes a display configured to display a plurality of polyhedral GUIs on a screen, and a controller configured to control the display to display at least one of a size of the plurality of polyhedral GUIs and an arrangement of the plurality of polyhedral GUIs differently depending on a priority of the content-related information. | 11-13-2014 |
20140337792 | DISPLAY APPARATUS AND USER INTERFACE SCREEN PROVIDING METHOD THEREOF - A display apparatus and a method of providing a user interface screen on a display apparatus are provided. The display apparatus includes: a display configured to display a polyhedral graphic user interface (GUI) on a screen; a user interface unit configured to receive a user interaction with the displayed polyhedral GUI; and a controller configured to control the display to display at least one of detailed information and associated information of content information on at least one surface of the displayed polyhedral GUI according to the received user interaction. | 11-13-2014 |
20140337892 | DISPLAY APPARATUS AND USER INTERFACE SCREEN PROVIDING METHOD THEREOF - A display apparatus comprising a display configured to display a plurality of spaces in a form of a polyhedron is provided. The plurality of spaces each correspond to a different category. The apparatus displays a rotatable Graphical User Interface (GUI), a user interface is configured to receive a user interaction for the GUI, and a controller is configured to, when one of the plurality of spaces in a form of a polyhedron is selected as the GUI is rotated according to the user interaction, control to display a selected space as a main space, and display at least one content-related information included in a category corresponding to the selected space. | 11-13-2014 |
Patent application number | Description | Published |
20080231783 | REFLECTIVE-TRANSMISSIVE TYPE LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - A reflective-transmissive type liquid crystal display device and a method for fabricating the reflective-transmissive type liquid crystal display device are provided. The reflective-transmissive type liquid crystal display device includes a pixel electrode having a transparent electrode for displaying information in a dark place where light is insufficiently provided, a reflective electrode for displaying information in a place where light is sufficiently provided, and an orientation film having an orientation groove provided on an upper surface of the pixel electrode, the direction of the orientation groove being varied depending on a shape of the reflective electrode. The reflective-transmissive type liquid crystal display device prevents the generation of an afterimage, which is generated when a response speed of liquid crystal is lowered due to the impurities or ions stacked at a boundary of the reflective electrode and the transparent electrode, thereby improving quality of display. | 09-25-2008 |
20090147189 | DISPLAY PANEL - In a display panel, an array substrate includes a pixel electrode disposed in a pixel area and a switching element connected to the pixel electrode. A color filter substrate is combined with the array substrate. The color filter substrate includes a light-blocking layer, a color filter layer, and a common electrode. The color filter layer is disposed on the light-blocking layer. The common electrode is disposed on the color filter layer. The common electrode has an opening disposed in the pixel area and extending along the longitudinal direction. The opening has left, right, upper and lower sides and a plurality of notch parts disposed at the upper and lower sides. An outermost notch part is spaced apart from the left side or the right side by 20 μm to 30 μm. | 06-11-2009 |
20090296012 | LIQUID CRYSTAL DISPLAY AND METHOD OF MANUFACTURING THEREOF - A display device includes a thin film transistor (TFT) substrate, a countering substrate facing the TFT substrate, a sealant, and a liquid crystal layer interposed between the TFT substrate and the countering substrate. The TFT substrate includes a substrate having a display area and a peripheral area, a first TFT formed in the peripheral area and including a semiconductor layer and a resistive contact member formed on the semiconductor layer, a light blocking semiconductor pattern, a second TFT formed in the display area and including a gate electrode. The sealant couples the TFT substrate to the countering substrate, and covers the first TFT. | 12-03-2009 |
20100045916 | UPPER SUBSTRATE AND LIQUID CRYSTAL DISPLAY DEVICE HAVING THE SAME - A liquid crystal display apparatus includes a lower substrate, an upper substrate and a liquid crystal layer interposed between the lower substrate and the upper substrate. The lower substrate includes a display part for displaying image and a driving part for providing the display part with a driving signal. The upper substrate includes a common electrode and an insulating member that electrically insulates the common electrode from the driving part. The insulating member has a lower dielectric constant than the liquid crystal layer. Thus, a parasitic capacitance between the driving part and the common electrode is reduced to prevent malfunction of the driving part, and a display quality is enhanced | 02-25-2010 |
20100117088 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF MANUFACTURING THE SAME - A thin film transistor (TFT) substrate having an improved wire structure without an under-cut phenomenon that may occur during formation of a gate wire having a double-layered structure and a method of manufacturing the same are provided, where the method includes forming a first metal layer made of at least one low resistance material selected from the group consisting of Al, AlNd, Cu, and Ag, forming a second metal layer made of at least one heat-resistant, etch-resistant material selected from the group consisting of Cr, CrNx, Ti, Mo, and MoW on the first metal layer, forming an etch mask on the second metal layer, sequentially etching the second metal layer and the first metal layer using the etch mask, and forming a second metal layer pattern and a first metal layer pattern, respectively, and selectively re-etching the second metal layer pattern using the etch mask to make a width of the second metal layer pattern smaller than or substantially equal to a width of the first metal layer pattern, and completing a gate wire. | 05-13-2010 |
20130099262 | LIQUID CRYSTAL DISPLAY - A liquid crystal display according to an exemplary embodiment of the present invention includes a substrate, a plurality of pixels arranged in a matrix on the substrate where each pixel includes a switching element, a plurality of gate lines that are connected to the switching elements and extend in a row direction, and a gate driver that is connected to the gate lines and is formed on the substrate as an integrated circuit. In the liquid crystal display, the gate driver includes a first region and a second region that is not aligned with the first region. | 04-25-2013 |
20140131672 | ORGANIC LIGHT EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - Embodiments are directed to an organic light emitting display device, including a substrate, and a plurality of pixels, each pixel including a protrusion pattern and a trench area formed in the substrate, an organic light emitting device disposed on the substrate, a capacitor, the capacitor including a first capacitor electrode and a second capacitor electrode, a first transistor, the first transistor being coupled to a gate line extended in a row direction, a data line extended in a column direction crossing the row direction, and the first capacitor electrode, and a second transistor, the second transistor being coupled to the first capacitor electrode, a voltage line extended in the column direction, and the organic light emitting device, wherein the second capacitor electrode is branched from the voltage line, and the gate line and the first capacitor electrode are formed on and overlap the protrusion pattern. | 05-15-2014 |
20140132876 | LIQUID CRYSTAL DISPLAY - A liquid crystal display according to an exemplary embodiment of the present invention includes a substrate, a plurality of pixels arranged in a matrix on the substrate where each pixel includes a switching element, a plurality of gate lines that are connected to the switching elements and extend in a row direction, and a gate driver that is connected to the gate lines and is formed on the substrate as an integrated circuit. In the liquid crystal display, the gate driver includes a first region and a second region that is not aligned with the first region. | 05-15-2014 |
20140354139 | LIGHT EMITTING DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME - A light emitting display device includes: a substrate; a first electrode disposed on the substrate in each pixel area; an insulating film disposed on the substrate, where a first opening, which exposes the first electrode, is defined in the insulating film; a blocking film disposed on a side surface of the insulating film, which defines the first opening; a light emitting layer disposed in the first opening and on the first electrode, where the light emitting layer is in contact with the blocking film; and a second electrode disposed on the light emitting layer. | 12-04-2014 |
20140367664 | DISPLAY DEVICE AND METHOD FOR MANUFACTURING DISPLAY DEVICE - Provided is a display device, including: a substrate; signal lines including a gate line, a data line, and a driving voltage line that collectively define an outer boundary of a pixel area; a transistor connected to the signal line; a first electrode extending across the pixel area and formed on the signal line and the transistor, and connected to the transistor, the first electrode having a first portion overlying only the signal line and the transistor, and a second portion comprising all of the first electrode not included in the first portion; a pixel defining layer formed on only the first portion of the first electrode; an organic emission layer formed on substantially the entire second portion but not on the first portion; and a second electrode formed on the pixel defining layer and the organic emission layer. | 12-18-2014 |