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| 20100229074 | METHOD AND APPARATUS FOR TRANSMITTING DATA IN OPTICAL TRANSPORT NETWORK - A method of transmitting data in an optical transport network is provided. The method comprises generating an optical transmission unit frame including an in-band area including a first area to which information data is allocated and a second area to which the information data is not allocated and an out-band area including parity information and transmitting the data through the optical transmission unit frame. | 09-09-2010 |
| 20100299578 | APPARATUS AND METHOD FOR TRANSMITTING AND RECEIVING DATA - A transmitting apparatus in a transport network performs forward error correcting encoding for each virtual lane set as a multiple of the transmission channels, to generate virtual frames including independent parity bytes for each virtual lane. The generated virtual frames are transmitted through at least one transmission channel. In addition, a receiving apparatus detects the virtual frames for each virtual lane from a signal received through a transmission channel by using a frame assignment sequence, and performs forward error correcting decoding by using the parity bytes included in the virtual frames detected for each virtual lane. | 11-25-2010 |
| 20110150095 | IMAGE ENCODING/DECODING APPARATUS AND METHOD - Provided is an image encoding/decoding apparatus and method. The image encoding apparatus may include a motion vector prediction unit to perform a prediction with respect to an arbitrary motion vector of a current block within an image, using at least one of vector information of a motion vector corresponding to an adjacent block and vector information of a previous motion vector of the current block, and a differential determination unit to determine differential information of a motion vector of the current block based on the motion vector predicted in the motion vector prediction unit and an actual motion vector of the current block. | 06-23-2011 |
| 20110286744 | METHOD AND APPARATUS FOR TRANSMITTING PACKET IN OPTICAL TRANSPORT NETWORK - A method of transmitting a packet in an optical transport network includes: generating a GFP frame by GFP encapsulating a packet client signal; mapping the GFP frame to a dynamic data unit; multiplexing to a high order data unit in an order higher than that of the dynamic data unit using at least one dynamic data unit; generating a high order transport unit using the multiplexed high order data unit; and transmitting the high order transport unit. | 11-24-2011 |
| 20110292999 | SUPER MACRO BLOCK BASED INTRA CODING METHOD AND APPARATUS - Provided are technologies that may perform intra coding of a super macro block that is an enlarged macro block. In this case, the super macro block is handled as a single entity or may be divided into a plurality of macro blocks. The present invention may perform intra coding both when the super macro block is handled as the single entity and when the super macro block is divided into the plurality of macro blocks. | 12-01-2011 |
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| 20100072593 | Semiconductor package and method for manufacturing the same - A semiconductor package includes a first package including at least one first semiconductor chip; a second package including an external connection terminal and at least one second semiconductor chip, the second package being stacked on the first package; and an interposer disposed between the first and second packages and connected to the external connection terminal to electrically connect the first and second packages to each other. The interposer comprises an intermediate connector having an exposed end portion to which the second package is electrically connected via the external connection terminal and a protruding end portion lower than the exposed end portion to which the first package is electrically connected. | 03-25-2010 |
| 20100096754 | Semiconductor package, semiconductor module, and method for fabricating the semiconductor package - Provided is a semiconductor package, a semiconductor module and a method for fabricating the semiconductor package. The method provides a substrate including a bonding pad. The method forms a dielectric layer for exposing the bonding pad on the substrate. The method forms a redistribution line which is electrically connected to the bonding pad, on the dielectric layer. The method forms an external terminal which is electrically connected to the bonding pad without using a solder mask which limits a position of the external terminal, on the redistribution line. | 04-22-2010 |
| 20110095418 | SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SAME - A semiconductor package includes a semiconductor chip having a first bump group and a second bump group, and a package substrate having a first pattern for data communication with the semiconductor chip and a second pattern for supplying power to the semiconductor chip or grounding the semiconductor chip, wherein the first bump group is disposed on the first pattern and the second bump group is disposed on the second pattern. | 04-28-2011 |
| 20110272736 | SEMICONDUCTOR DEVICES AND METHODS FOR FABRICATING THE SAME - A semiconductor device includes a substrate including a first region and a second region each having an n-type region and a p-type region, wherein the n-type region in the first region includes a silicon channel, the p-type region in the first region includes a silicon germanium channel, and the n-type region and the p-type region in the second region respectively include a silicon channel. A first gate insulating pattern formed of a thermal oxide layer is disposed on the substrate of the n-type and p-type regions in the second region. | 11-10-2011 |
| 20120001329 | SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME - A semiconductor package and a method for fabricating the same. The semiconductor package includes a first substrate including a first pad, a second substrate spaced apart from the first substrate and where a second pad is formed to face the first pad, a first bump electrically connecting the first pad to the second pad, and a second bump mechanically connecting the first substrate to the second substrate is disposed between the first substrate where the first pad is not formed and the second substrate where the second pad is not formed. A coefficient of thermal expansion (CTE) of the second bump is smaller than that of the first bump. | 01-05-2012 |
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| 20100047676 | BATTERY PACK CASE - Disclosed herein are a pack case constructed in a structure in which a plurality of battery cells are mounted in the pack case to electrically connect the battery cells with each other, wherein the pack case includes an upper case and a lower case constructed in a hollow structure in which the upper case and the lower case are coupled with each other while the battery cells are mounted between the upper case and the lower case, each case is integrally provided at the inner part thereof with a plurality of spacers for supporting the battery cells, and each case is provided at the outer part thereof with a plurality of ventilation openings which communicate with the interior of each case, and a battery pack including the pack case. The pack case according to the present invention has effects in that a plurality of battery cells are stably mounted in the pack case in a compact structure through a simple assembly process, heat generated from the battery cells is effectively removed during the charge and discharge of the battery cells, and an additional safety unit, such as a detection member and/or a protection circuit module, is easily mounted to the pack case. | 02-25-2010 |
| 20100255355 | CONNECTION-MEMBER FOR ELECTRICAL CONNECTION OF BATTERY CELLS - Disclosed herein are a connection member for electrically interconnecting a plurality of battery cells in a battery pack in which the battery cells are mounted, wherein the connection member includes at least two terminal contact parts, which are connected to electrode terminals of neighboring battery cells, and a connection part for interconnecting the terminal contact parts, and wherein the terminal contact parts are lower in height, by a size corresponding to the thickness of a pack case, than the connection part such that the connection member connects the electrode terminals of the battery cells while the connection member is mounted on the outer surface of the pack case, and a battery pack including the same. Consequently, the connection member according to the present invention has the effect of effectively interconnecting the electrode terminals of the battery cells through a simple assembly process. Also, the connection member according to the present invention can be directly mounted on the pack case without using an additional auxiliary member. | 10-07-2010 |
| 20110207313 | Semiconductor Devices and Methods of Fabricating the Same - Semiconductor devices and a methods of fabricating the semiconductor devices are provided. The methods may include forming a pattern on a substrate, forming a capping dielectric layer on the pattern, and thermally processing the substrate. After thermally processing the substrate, the methods may further include forming a diffusion barrier layer by a nitride process that may include supplying nitrogen to the capping dielectric layer. The methods may also include forming an etching stop layer on the diffusion barrier layer, forming an inter-layer dielectric layer on the etching stop layer, and planarizing the inter-layer dielectric layer. | 08-25-2011 |
| 20110254077 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor device includes a plurality of gate structures disposed on a substrate. Respective gate structures may include a lower control gate layer and an upper control gate layer. The upper control gate layer may be disposed on the lower control gate layer and may include a different material from the lower control gate layer. The semiconductor device may further include insulation patterned layers disposed in gap regions defined between the gate structures adjacent to each other. Upper surfaces of the insulation patterned layers may be lower than an upper surface of the lower control gate layer. | 10-20-2011 |
