Jong-Wan
Jong Wan Kim, Suwon-Si KR
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20130074140 | METHOD AND APPARATUS FOR DISTRIBUTING VIDEO UNDER MULTI-CHANNEL, AND VIDEO MANAGEMENT SYSTEM USING THE SAME - The present disclosure provides a multi-channel video distribution method and apparatus, and a video management system using the same, including a client system to communicate with a standardized video providing apparatus or a non-standardized video providing apparatus, and to receive a video/sound signal from the standardized video providing apparatus or the non-standardized video providing apparatus; a transcode system to convert the video/sound signal, received by the client system, to a video/sound format that is requested in a client application; and a server system to communicate with the client application, and to transmit, to the client application, the video/sound signal that is converted by the transcode system. | 03-21-2013 |
Jong Wan Kim, Daejeon KR
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20140058024 | NON-HALOGEN FLAME RETARDANT AND HIGH RIGIDITY POLYCARBONATE RESIN COMPOSITION - A non-halogen flame retardant and high rigidity polycarbonate resin composition is disclosed. The non-halogen flame retardant and high rigidity polycarbonate resin composition has excellent flame retardancy and rigidity by overcoming a conventional problem such as poor rigidity occurred, upon adding a flame retardant agent in polycarbonate resin composition reinforced with a glass fiber having improved rigidity such as flexibility and surface smoothness etc., imposed by the use of the glass fiber. | 02-27-2014 |
Jong Wan Park, Seoul KR
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20160124002 | METHOD FOR DETECTING HYPOXIA OR DIAGNOSING HYPOXIA-RELATED DISEASES - The present invention provides a composition, kit, and method for detecting hypoxia or diagnosing hypoxia-related diseases, the composition containing a material for detecting arachidonic acid and a derivative thereof. The composition, kit, and method according to the present invention can conveniently and promptly detect hypoxia through the detection of a biomarker in a biological sample, and thus can be useful in the prevention or early diagnose of diseases caused by hypoxia, the determination of the severity of diseases and therapeutic effects, tracking of diseases, or the like. | 05-05-2016 |
Jong Wan Seo, Hwaseong KR
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20130320293 | SEMICONDUCTOR LIGHT EMITTING DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor light emitting device package includes a base unit including a main body having electrical insulation properties and at least one pair of first and second through electrodes formed in the main body in a thickness direction thereof and formed of a semiconductor material, and a light emitting structure disposed on the base unit and including first and second conductivity type semiconductor layers and an active layer interposed there between. The manufacturing process thereof may be simplified, whereby a reduction in manufacturing costs and time may be achieved. | 12-05-2013 |
Jong Wan Seo, Gyeonggi-Do KR
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20130157417 | METHOD OF MANUFACTURING SUBSTRATE FOR MOUNTING ELECTRONIC DEVICE - A method of manufacturing a substrate for mounting an electronic device, includes forming at least one through-hole in a plate-shaped substrate body in a thickness direction thereof. An electrode substrate having at least one core on an upper surface thereof is formed such that the at least one core corresponds to the at least one through-hole. The electrode substrate is coupled to the substrate body by inserting the at least one core into the at least one through-hole. A portion of the coupled electrode substrate is removed except for the at least one core. | 06-20-2013 |
Jong Wan Seo, Ansan-Si KR
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20160027977 | LIGHT EMITTING DIODE PACKAGE AND LIGHTING DEVICE USING THE SAME - A light emitting diode (LED) package may include a package body provided with a pair of lead frames, and an LED chip mounted on the package body and electrically connected to the lead frames through wire bonding. Each lead frame may include a first reflective layer disposed on a mounting surface on which the LED chip is disposed and a second reflective layer disposed on the first reflective layer. A wire may penetrate through the second reflective layer to be connected to the first reflective layer. Accordingly, the LED package may provide the uniform amount of light by suppressing discoloration of the lead frames, and the manufacturing time of the LED package may be reduced, leading to a reduction in manufacturing costs. | 01-28-2016 |
Jong-Wan Choi, Suwon-Si KR
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20090020847 | Semiconductor device having trench isolation region and methods of fabricating the same - A semiconductor device having a trench isolation region and methods of fabricating the same are provided. The method includes forming a first trench region in a substrate, and a second trench region having a larger width than the first trench region in the substrate. A lower material layer may fill the first and second trench regions. The lower material layer may be etched by a first etching process to form a first preliminary lower material layer pattern remaining in the first trench region and form a second preliminary lower material layer pattern that remains in the second trench region. An upper surface of the second preliminary lower material layer pattern may be at a different height than the first preliminary lower material layer pattern. The first and second preliminary lower material layer patterns may be etched by a second etching process to form first and second lower material layer patterns having top surfaces at substantially the same height. First and second upper material layer patterns may be formed on the first and second lower material layer patterns, respectively. | 01-22-2009 |
20090045483 | Semiconductor devices having trench isolation regions and methods of manufacturing semiconductor devices having trench isolation regions - A semiconductor device may include a semiconductor substrate, trench region, buffer pattern, gap fill layer, and transistor. The trench region may be provided in the semiconductor substrate to define an active region. The buffer pattern and gap fill layer may be provided in the trench region. The buffer pattern and gap fill layer may fill the trench region. The gap fill layer may be densified by the buffer pattern. The transistor may be provided in the active region. A method of manufacturing a semiconductor device may include: forming a trench region in a semiconductor substrate; forming a buffer layer on an inner wall of the first trench region; forming a gap fill layer, filling the trench region; performing a thermal process to react the impurity with the oxygen, forming a buffer pattern; and forming a transistor in the active region. | 02-19-2009 |
20090191687 | METHOD OF FILLING A TRENCH AND METHOD OF FORMING AN ISOLATING LAYER STRUCTURE USING THE SAME - A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material. | 07-30-2009 |
20110256708 | Methods of Manufacturing Flash Memory Devices by Selective Removal of Nitrogen Atoms - A method of manufacturing a flash memory device includes: forming a dielectric layer on an active region of a substrate having an isolation region and the active region; forming a floating gate on the dielectric layer; forming an isolation layer in the isolation region; forming a nitride layer including a first nitride layer portion formed on an exposed surface of the floating gate and a second nitride layer portion formed on an exposed surface of the isolation layer; selectively removing nitrogen atoms from the second nitride layer portion of the nitride layer; forming an inter-gate dielectric layer on both the first nitride layer portion and the isolation layer; and forming a control gate on the inter-gate dielectric layer. | 10-20-2011 |
20110306195 | METHOD OF MANUFACTURING VERTICAL SEMICONDUCTOR DEVICES - In a vertical semiconductor device and a method of manufacturing a vertical semiconductor device, sacrificial layers and insulating interlayers are repeatedly and alternately stacked on a substrate. The sacrificial layers include boron (B) and nitrogen (N) and have an etching selectivity with respect to the insulating interlayers. Semiconductor patterns are formed on the substrate through the sacrificial layers and the insulating interlayers. The sacrificial layers and the insulating interlayers are at least partially removed between the semiconductor patterns to form sacrificial layer patterns and insulating interlayer patterns on sidewalls of the semiconductor patterns. The sacrificial layer patterns are removed to form grooves between the insulating interlayer patterns. The grooves expose portions of the sidewalls of the semiconductor patterns. A gate structure is formed in each of the grooves. | 12-15-2011 |
20120061763 | METHODS OF FORMING NON-VOLATILE MEMORY DEVICES INCLUDING LOW-K DIELECTRIC GAPS IN SUBSTRATES AND DEVICES SO FORMED - A method of manufacturing a non-volatile memory device, can be provided by forming a gate insulating layer and a gate conductive layer on a substrate that includes active regions that are defined by device isolation regions that include a carbon-containing silicon oxide layer. The gate conductive layer and the gate insulating layer can be sequentially etched to expose the carbon-containing silicon oxide layer. The carbon-containing silicon oxide layer can be wet-etched to recess a surface of the carbon-containing silicon oxide layer to below a surface of the substrate. Then, an interlayer insulating layer can be formed between the gate insulating layer and the gate conductive layer on the carbon-containing silicon oxide layer, where an air gap can be formed between the carbon-containing silicon oxide layer and the gate insulating layer. | 03-15-2012 |
20150064885 | METHODS OF FORMING SEMICONDUCTOR DEVICES INCLUDING VERTICAL CHANNELS AND SEMICONDUCTOR DEVICES FORMED USING SUCH METHODS - Methods of forming semiconductor devices including vertical channels and semiconductor devices formed using such methods are provided. The methods may include forming a stack including a plurality of insulating patterns alternating with a plurality of conductive patterns on an upper surface of a substrate and forming a hole through the stack. The hole may expose sidewalls of the plurality of insulating patterns and the plurality of conductive patterns. The sidewalls of the plurality of insulating patterns may be aligned along a first plane that is slanted with respect to the upper surface of the substrate, and midpoints of the respective sidewalls of the plurality of conductive patterns may be aligned along a second plane that is substantially perpendicular to the upper surface of the substrate. | 03-05-2015 |
Jong-Wan Choi, Seoul KR
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20100055212 | COSMETIC COMPOSITION COMPRISING TISSUE CULTURED PANAX GINSENG C.A. MEYERADVENTITIOUS ROOT ITSELF AND A PREPARING METHOD THEREOF - The present invention relates to a cosmetic composition comprising tissue-cultured adventitious roots itself of ginseng, and to a preparing method thereof. The cosmetic composition of the present invention is characterized in that effective ingredients are dip-extracted from the tissue cultured adventitious roots of a ginseng contained in the composition, without any additional process for preparing an extract of the tissue-cultured adventitious roots of a ginseng. In the cosmetic composition of the present invention, the effective ingredients are naturally and continuously dip-extracted from the tissue-cultured adventitious roots itself of a ginseng and maintained, and also allows a user to recognize visually the presence of the adventitious roots of a ginseng, thereby giving trust of the presence of the effective ingredient to the user, and improving user's satisfaction through its natural flavor. Further, the preparing method for the cosmetic composition is a simple and inexpensive process without any additional step, such as extraction, isolation and purification, and further has an advantage that an effective ingredient is dip-extracted from the adventitious roots itself of ginseng while not losing an effective ingredient. | 03-04-2010 |
Jong-Wan Choi, Gyeonggi-Do KR
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20080206954 | METHODS OF REDUCING IMPURITY CONCENTRATION IN ISOLATING FILMS IN SEMICONDUCTOR DEVICES - A method of fabricating a semiconductor device includes forming a lower device on a lower semiconductor substrate, and forming an interlayer insulating film on the lower device. An upper semiconductor substrate is formed on the interlayer insulating film such that the interlayer insulating film is between the lower and upper semiconductor substrates. Upper trenches are formed within the upper semiconductor substrate. An upper device isolating film is formed within the upper trenches. The upper device isolating film is irradiated with ultraviolet light having a wavelength configured to break chemical bonds of impurities in the upper device isolating film to reduce an impurity concentration thereof. | 08-28-2008 |
20100167490 | Method of Fabricating Flash Memory Device - Provided are methods of fabricating flash memory devices that may prevent a short circuit from occurring between cell gate lines. Methods of fabricating such flash memory devices may include forming gate lines including a series of multiple cell gate lines and multiple selection gate lines. Each gate line may include a stacked structure of a tunnel insulating layer, a floating gate, a gate insulating layer, and/or a polysilicon layer operable to be a control gate, all formed on a semiconductor substrate. Methods may include forming a first insulating layer that selectively fills gaps between the cell gate lines from the bottom up and between adjacent ones of the cell gate lines and the selection gate lines, and does not fill a space located on outer sides of the selection gate lines that are opposite the plurality of cell gate lines. A spacer may be formed on the outer sides of the selection gate lines that are opposite to the cell gate lines, after forming the first insulating layer. A second insulating layer may be formed in a space where the spacer is formed. | 07-01-2010 |
Jong-Wan Jung, Gyeonggi-Do KR
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20090166696 | CMOS Image Device with Local Impurity Region - According to a CMOS image device and a method of manufacturing same, dark current is decreased by a local impurity region. The image device includes a semiconductor substrate, and a transfer gate formed on a predetermined portion of the semiconductor substrate and electrically insulated from the semiconductor substrate. A photodiode is formed in the semiconductor substrate on one side of the transfer gate, and a floating diffusion region is formed on the semiconductor substrate in the other side of the transfer gate. A local impurity region of a first conductivity type is formed to be partially overlapped the transfer gate between the photodiode and the floating diffusion region. | 07-02-2009 |
Jong-Wan Lee, Seoul KR
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20140129760 | NON-VOLATILE MEMORY SYSTEM AND HOST CONFIGURED TO COMMUNICATE WITH THE SAME - A nonvolatile memory system includes a memory controller for copying a mapping data group including logical-physical address mapping information regarding user data from a nonvolatile memory to a mapping information storage unit, and transmit size information regarding the mapping data group to a host. The host may receive size information regarding the mapping data group from the nonvolatile memory system, and determine the order of commands to be transmitted to the nonvolatile memory based on the size information regarding the mapping data group. | 05-08-2014 |
Jong-Wan Shim, Hwaseong-Si KR
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20140222360 | DEVICE FOR MEASURING INTEGRATED CIRCUIT CURRENT AND METHOD OF MEASURING INTEGRATED CIRCUIT CURRENT USING THE DEVICE - A method of extracting an Integrated Circuit (IC) current is provided. The method includes generating a transfer function value by using a voltage measured in a node nearest an input terminal of the IC, substituting the generated transfer function value for a reverse fast Fourier transform function, so as to extract the IC voltage, and extracting the IC current from the extracted IC voltage through a simulation in a time domain. | 08-07-2014 |
Jong-Wan Yi, Seoul KR
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20130297968 | NONVOLATILE MEMORY CONTROLLER AND A NONVOLATILE MEMORY SYSTEM - A nonvolatile memory (NVM) controller that includes a command decoder that receives a command from a host and outputs an index in response to the command, a program memory that stores a command mapping table including address information for accessing a program corresponding to the command and a processor that receives an index from the command decoder and controls the address information to be output in response to the index. | 11-07-2013 |