Patent application number | Description | Published |
20120164812 | Methods of Manufacturing Semiconductor Devices - In a method of manufacturing a semiconductor device, a mask is formed on a substrate. The substrate is divided into a first region and a second region. An upper portion of the substrate in the first region is partially removed using the mask as an etching mask to form a recess. A first gate structure is formed in the recess. A portion of the mask in the first region is removed. A blocking layer pattern is formed on the substrate in the first region over the first gate structure. | 06-28-2012 |
20120261747 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME - A semiconductor device includes a word line and a bit line on a substrate and the word line intersects the bit line, an insulating layer on the substrate and the insulating layer includes voids therein, and a passivation layer on the insulating layer and the passivation layer includes hydrogen atoms therein. The voids define diffusion pathways through which the hydrogen atoms in the passivation layer diffuse in a direction toward the substrate. | 10-18-2012 |
20130248956 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device may include active patterns of pillar-shapes disposed on a substrate and spaced apart from each other in one direction; a gate electrode extending in the one direction and overlapped with sidewalls of the active patterns; a gate insulating layer disposed between the gate electrode and the active patterns; bit lines connected to bottom surfaces of respective active patterns; and/or capacitors connected to top surfaces of the respective active patterns. Each of the active patterns may have no p-type/n-type (PN) junctions. A semiconductor device may include a substrate; active patterns on the substrate that are spaced apart from each other; a gate electrode configured to overlap sidewalls of the active patterns; and/or gate insulating layers between the gate electrode and respective active patterns. The active patterns may be doped with dopants of a same conductivity type. | 09-26-2013 |
20140179073 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A method of manufacturing a semiconductor device may include: forming active patterns of pillar-shapes upward protruding from a substrate, the active patterns fully doped with dopants of one conductivity type; forming a gate electrode extending in one direction, the gate electrode overlapped with sidewalls of the active patterns; and forming a gate insulating layer between the gate electrode and the active patterns. | 06-26-2014 |
20140264568 | SEMICONDUCTOR DEVICE AND METHODS OF MANUFACTURING THE SAME - In a method of manufacturing a semiconductor device, a trench is formed by removing an upper portion of a substrate. A gate insulation layer pattern is formed on an inner wall of the trench. A gate electrode is formed on the gate insulation layer pattern. The gate electrode fills a lower portion of the trench. A capping layer is formed on the gate electrode and the gate insulation layer pattern. The capping layer is partially oxidized to form a first capping layer pattern and a second capping layer pattern. The first capping layer pattern is not oxidized, and the second capping layer pattern is oxidized. A third capping layer pattern is formed on the second capping layer pattern, the third capping layer pattern filling an upper portion of the trench. | 09-18-2014 |
20140291804 | SEMICONDUCTOR DEVICES HAVING BALANCING CAPACITOR AND METHODS OF FORMING THE SAME - A semiconductor memory device includes a substrate including cell block, a balancing block, and a sense block. A plurality of cell bit lines are formed in the cell block of. A plurality of cell plugs are formed adjacent to side surfaces of the bit lines. Cell inner spacers, air spacers, and cell outer spacers are formed between the cell bit lines and the cell plugs. A plurality of balancing bit lines are formed in the balancing block. A plurality of balancing plugs are formed adjacent to side surfaces of the balancing bit lines. Balancing inner spacers and balancing outer spacers are formed between the balancing bit lines and the balancing plugs. The balancing bit lines and at least some of the cell bit lines are connected to the sense block. | 10-02-2014 |
20150044829 | Methods of Fabricating Semiconductor Devices Having Punch-Through Stopping Regions - Methods of fabricating semiconductor devices are provided including providing a substrate having a first region and a second region, the substrate defining trenches in the first and second regions; forming active fins on the first and second regions, the active fins protruding from the trenches in the first and second regions; forming spacers on sidewalls of the active fins in the first and second regions; recessing floors of the trenches under the spacers to provide extensions of the active fins; implanting impurities of a first type in the extensions of the active fins in the first region; and implanting impurities of a second, type, different from the first type, in the extensions of the active fins in the second region. | 02-12-2015 |