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Jong-Pyo
Jong-Pyo Cho, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20080224476 | PORTABLE POWER PACK, FUEL/AIR SUPPLY FOR THE PORTABLE POWER PACK, UNIFLOW SCAVENGING MICRO-ENGINE FOR THE PORTABLE POWER PACK AND OPERATION METHOD THEREOF - A small portable power pack includes a fuel/air supply for mixing fuel, which is supplied from outside, with outside air, thereby providing mixed gas; a uniflow scavenging micro-engine for receiving mixed gas from the fuel/air supply and igniting mixed gas to explode; a control panel for operating and controlling the uniflow scavenging micro-engine; a capacitor battery for powering the control panel and the uniflow scavenging micro-engine. The portable power pack is easily carried and used without the restriction of spaces and sites. | 09-18-2008 |
Jong-Pyo Kim, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090098692 | Method for Fabricating a Semiconductor Gate Structure - A method of making a semiconductor device is disclosed. A mask if formed over a first and a second region of a semiconductor body, and a vertical diffusion barrier is formed in a region between the first and second regions. A mask is then formed over the second region and the first region is left unmasked. The semiconductor body is exposed to a dopant, so that the first region is doped and the second region is blocked from the dopant by the mask and by the vertical diffusion barrier. | 04-16-2009 |
| 20090267129 | DIELECTRIC MULTILAYER STRUCTURES OF MICROELECTRONIC DEVICES AND METHODS FOR FABRICATING THE SAME - A dielectric multilayer structure of a microelectronic device, in which a leakage current characteristic and a dielectric constant are improved, is provided in an embodiment. The dielectric multilayer structure includes a lower dielectric layer, which is made of amorphous silicate (M | 10-29-2009 |
Jong-Pyo Kim, Seongnam-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090250774 | Gate Structure - A gate structure includes a gate insulation layer pattern, a gate electrode, a first spacer and a protecting layer pattern. The gate insulation layer pattern is on a substrate. The gate electrode is on the gate insulation layer pattern, the gate electrode including a lower portion having a first width, a central portion having a second width smaller than the first width and an upper portion having a third width. The first spacer is on a lower sidewall of the gate electrode. The protecting layer pattern is on a central sidewall of the gate electrode. | 10-08-2009 |