Patent application number | Description | Published |
20140167086 | EPITAXIAL LAYER WAFER HAVING VOID FOR SEPARATING GROWTH SUBSTRATE THEREFROM AND SEMICONDUCTOR DEVICE FABRICATED USING THE SAME - An epitaxial wafer having a void for separation of a substrate and a semiconductor device fabricated using the same. The epitaxial wafer includes a substrate, a mask pattern disposed on the substrate and comprising a masking region and an opening region, and an epitaxial layer covering the mask pattern. The epitaxial layer includes a void disposed on the masking region. | 06-19-2014 |
20140179043 | METHOD OF SEPARATING SUBSTRATE AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME - A method of fabricating a semiconductor device, the method including: forming a first mask pattern including a masking region and an open region on a substrate; forming a sacrificial layer to cover the substrate and the first mask pattern; patterning the sacrificial layer to form a seed layer and to expose the first mask pattern; forming a second mask pattern on the exposed first mask pattern; forming an epitaxial layer on the seed layer and the second mask pattern, and forming a void between the second mask pattern and the epitaxial layer; and separating the substrate from the epitaxial layer. | 06-26-2014 |
20140361327 | LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - The present invention relates to a light emitting diode and a method of manufacturing same. The light emitting diode includes: a first conductive semiconductor layer; a plurality of mesas that are disposed spaced apart from one another on the first conductive semiconductor layer, each mesa including an active layer and a second conductive semiconductor layer; reflective electrodes that are respectively disposed on the plurality of mesas and come into ohmic contact with the second conductive semiconductor layer; openings that cover the plurality of mesas and the first conductive semiconductor layer, are electrically insulated from the mesas, and expose the reflective electrodes to the upper region of each mesa; and a current spreading layer that comes into ohmic contact with the first conductive semiconductor layer. Thus, a light emitting diode that improves current spreading performance may be provided. | 12-11-2014 |
20150069444 | LIGHT EMITTING DIODE - A light emitting diode and a method of fabricating the same, the light emitting diode including a substrate, a semiconductor layer formed on one surface of the substrate, and an anti-reflection element formed on the other surface of the substrate and including a nano-pattern. The anti-reflection element is interposed between the substrate and air. | 03-12-2015 |
20150084084 | LIGHT EMITTING DIODE AND LED MODULE HAVING THE SAME - Disclosed are an LED and an LED module. The LED includes: a first conductivity type semiconductor layer; a mesa disposed over the first conductivity type semiconductor layer and including an active layer and a second conductivity type semiconductor layer; a first ohmic-contact structure in contact with the first conductivity type semiconductor layer; a second ohmic-contact structure in contact with the second conductivity type semiconductor layer; a lower insulating layer at least partially covering the mesa and the first conductivity type semiconductor layer and disposed to form a first opening part at least partially exposing the first ohmic-contact structure and a second opening part at least partially exposing the second ohmic-contact structure; and a current distributing layer connected to the first ohmic-contact structure at least partially exposed by the first opening part and disposed to form a third opening part at least partially exposing the second opening part. | 03-26-2015 |
20150084085 | LIGHT EMITTING DEVICE HAVING WIDE BEAM ANGLE AND METHOD OF FABRICATING THE SAME - A light emitting device having a wide beam angle and a method of fabricating the same. The light emitting device includes a light emitting structure, a substrate disposed on the light emitting structure, and an anti-reflection layer covering side surfaces of the light emitting structure and the substrate, and at least a portion of an upper surface of the substrate is exposed. | 03-26-2015 |
20150108525 | LIGHT EMITTING DIODE FOR SURFACE MOUNT TECHNOLOGY, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING LIGHT EMITTING DIODE MODULE - Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured. | 04-23-2015 |
20150108528 | LIGHT EMITTING DIODE MODULE FOR SURFACE MOUNT TECHNOLOGY AND METHOD OF MANUFACTURING THE SAME - Provided is a light emitting diode (LED) in which a side surface of a reflective metal layer has a predetermined angle, and occurrence of cracks in a conductive barrier layer formed on the reflective metal layer can be prevented. Also, an LED module using LEDs is disclosed. A reflection pattern electrically connected to a second semiconductor layer is partially exposed by patterning a first insulating layer. Accordingly, a first pad is formed through the partially opened first pad region. Also, a conductive reflection layer electrically connected to a first semiconductor layer forms a second pad region formed by patterning a second insulating layer. A second pad is formed on the second pad region. | 04-23-2015 |
20150179875 | TEMPLATE FOR GROWING SEMICONDUCTOR, METHOD OF SEPARATING GROWTH SUBSTRATE AND METHOD OF FABRICATING LIGHT EMITTING DEVICE USING THE SAME - A template for growing a semiconductor, a method of separating a growth substrate and a method of fabricating a light emitting device using the same are disclosed. The template for growing a semiconductor includes a growth substrate including a nitride substrate; a seed layer disposed on the growth substrate and including at least one trench; and a growth stop layer disposed on a bottom surface of the trench, wherein the trench includes an upper trench and a lower trench, and the upper trench has a smaller width than the lower trench. | 06-25-2015 |
20150200230 | WAFER LEVEL LIGHT-EMITTING DIODE ARRAY AND METHOD FOR MANUFACTURING SAME - Disclosed are a light emitting diode array on a wafer level and a method of forming the same. The light emitting diode array includes a growth substrate; a plurality of light emitting diodes arranged on the substrate, wherein each of the plurality of light emitting diodes has a first semiconductor layer, an active layer and a second semiconductor layer; and a plurality of upper electrodes arranged on the plurality of light emitting diodes and formed of an identical material, wherein each of the plurality of upper electrodes is electrically connected to the first semiconductor layer of a respective one of the light emitting diodes. At least one of the upper electrodes is electrically connected to the second semiconductor layer of an adjacent one of the light emitting diodes, and another of the upper electrodes is insulated from the second semiconductor layer of an adjacent one of the light emitting diodes. Accordingly, it is possible to provide a light emitting diode array that can be driven under at a high voltage and simplify a forming process thereof. | 07-16-2015 |
20150200334 | LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME - A light-emitting diode including a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer and having a conductivity type different than that of the first semiconductor layer, and a reflective pattern disposed on the second semiconductor layer and configured to reflect light emitted from the active layer, the reflective pattern having heterogeneous metal layers and configured to absorb stress caused by differences in coefficient of thermal expansion between the heterogeneous metal layers. | 07-16-2015 |
20150214440 | LIGHT EMITTING DIODE FOR SURFACE MOUNT TECHNOLOGY, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING LIGHT EMITTING DIODE MODULE - Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured. | 07-30-2015 |
20150255504 | WAFER LEVEL LIGHT-EMITTING DIODE ARRAY - A light emitting diode array is provide to include: a substrate; light emitting diodes positioned over the substrate, each including a first semiconductor layer, an active layer, and a second semiconductor layer, wherein each light emitting diode is disposed to form a first via hole structure exposing a portion of the corresponding first semiconductor layer; lower electrodes disposed over the second semiconductor layer; a first interlayer insulating layer disposed over the lower electrodes and configured to expose the portion of the first semiconductor layer of corresponding light emitting diodes; upper electrodes electrically connected to the first semiconductor layer through the first via hole structure, wherein the first via hole structure is disposed in parallel with one side of the corresponding second semiconductor layer and the first interlayer insulating layer is disposed to form a second via hole structure exposing a portion of the lower electrodes. | 09-10-2015 |
20150270442 | LIGHT-EMITTING DIODE AND APPLICATION THEREFOR - A light-emitting diode is provided to include: a transparent substrate having a first surface, a second surface, and a side surface; a first conductive semiconductor layer positioned on the first surface of the transparent substrate; a second conductive semiconductor layer positioned on the first conductive semiconductor layer; an active layer positioned between the first conductive semiconductor layer and the second conductive semiconductor layer; a first pad electrically connected to the first conductive semiconductor layer; and a second pad electrically connected to the second conductive semiconductor layer, wherein the transparent substrate is configured to discharge light generated by the active layer through the second surface of the transparent substrate, and the light-emitting diode has a beam angle of at least 140 degrees or more. Accordingly, a light-emitting diode suitable for a backlight unit or a surface lighting apparatus can be provided. | 09-24-2015 |
20150280086 | WAFER LEVEL LIGHT-EMITTING DIODE ARRAY - A wafer level light-emitting diode (LED) array includes: a growth substrate; a plurality of LEDs arranged over the substrate, each including a first semiconductor layer, an activation layer, and a second semiconductor layer; a plurality of upper electrodes formed from a common material and electrically connected to the first semiconductor layers of the corresponding LEDs; and first and second pads arranged over the upper electrodes. The LEDs are connected in series by the upper electrodes, the first pad is electrically connected to an input LED from among the LEDs connected in series, and the second pad is electrically connected to an output LED from among the LEDs connected in series. Accordingly, a flip chip-type LED array can be provided which can be driven with a high voltage. | 10-01-2015 |
Patent application number | Description | Published |
20100096771 | METHOD FOR FABRICATING INJECTION-MOLDED PRODUCT - A method for fabricating an injection-molded product for a mold in which a pattern carved therein is prepared. An interim injection-molded product with a pattern arranged on an inner face thereof is fabricated using the mold having the carved pattern. Paint or a coloring agent is deposited on the inner face of the molded interim injection-molded product. The pattern on the injection-molded product finished by depositing paint is visible from an exterior of the finished product. | 04-22-2010 |
20130182855 | MULTIMEDIA PLAYING APPARATUS AND METHOD FOR OUTPUTTING MODULATED SOUND ACCORDING TO HEARING CHARACTERISTIC OF USER - Multimedia playing apparatuses and methods of measuring hearing characteristics of a user and outputting a sound modulated according to the hearing characteristics of the user are provided. A multimedia playing apparatus includes a sound output unit configured to output a sound comprising of one or more phonemes, and a user interface configured to receive a user response to the phonemes. The multimedia playing apparatus further includes a processor configured to acquire hearing characteristics of a user based on the user response, and determine an output level and/or an output time of the sound for each of frequency bands based on the hearing characteristics of the user. The sound output unit is further configured to output the sound according to the output level and/or the output time of the sound for each of the frequency bands. | 07-18-2013 |
20140146988 | WIRELESS COMMUNICATION METHOD AND APPARATUS OF HEARING DEVICE - A wireless communication method of a hearing aid includes extracting an audio signal through a first hearing aid, determining a beam forming vector as a beam toward a rear of a user wearing the first hearing aid and a second hearing aid. The method may also include pre-coding of the audio signal using the beam forming vector, and transmitting the pre-coded audio signal to the second hearing aid through a first antenna. The first hearing aid may include the first antenna and the second hearing aid includes a second antenna. | 05-29-2014 |
20140153757 | METHOD OF PROCESSING SOUND AND HEARING APPARATUS USING THE SAME - A hearing apparatus and a method thereof for processing a noise included in an input signal are provided. The method of processing noise involves: pairing a hearing apparatus with an electronic appliance; extracting noise characteristic information of the paired electronic appliance; and processing noise from the electronic appliance included in an input signal based on the noise characteristic information. | 06-05-2014 |
20140169574 | HEARING DEVICE CONSIDERING EXTERNAL ENVIRONMENT OF USER AND CONTROL METHOD OF HEARING DEVICE - A hearing device and a method of the hearing aid are provided considering an external environment surrounding a user. The hearing device includes an external environment determination unit, an inquiry unit, and a parameter set unit. The external environment determination unit is configured to determine an external environment surrounding a user wearing the hearing device. The inquiry unit is configured to select a question corresponding to the external environment and inquire the question to the user. The parameter set unit is configured to set a parameter of the hearing device based on a response to the question and hearing loss information of the user. | 06-19-2014 |
20140205118 | METHOD OF DETERMINING OPERATION MODE OF HEARING DEVICE AND HEARING DEVICE - A method of determining an operation mode of a hearing device and the hearing device may include detecting an input signal of the hearing device, determining the operation mode of the hearing device by determining whether the input signal is a designated signal related to a programming mode of the hearing device, and controlling the hearing device according to the operation mode. | 07-24-2014 |
20140211971 | HEARING LOSS COMPENSATION APPARATUS AND METHOD USING 3D EQUAL LOUDNESS CONTOUR - A hearing loss compensation apparatus and method compensate for distortion caused by a change in a sound transmission path using hearing characteristics of a user. The hearing loss compensation apparatus may include a sound direction detection device configured to detect a sound generation direction, in which a sound generates, using one or more microphones, and a sound compensation device configured to compensate the sound using hearing characteristics of a user corresponding to the sound generation direction. Additionally, a hearing characteristics measurement apparatus and method provide a way to obtain such hearing characteristics information. | 07-31-2014 |
20140294187 | APPARATUS AND METHOD FOR DETERMINING PARAMETER USING AUDITORY MODEL OF HEARING LOSS PATIENT - An apparatus and method are provided to determine a parameter using an auditory model of a hearing loss patient. The parameter determination apparatus determines a similarity between a neurogram of a normal subject and a neurogram of a hearing loss patient, and determines an optimal frequency band for the hearing loss patient based on the similarity. | 10-02-2014 |
20140307900 | APPARATUS FOR INPUTTING AUDIOGRAM USING TOUCH INPUT - An apparatus and a method for inputting audiogram using a touch input are provided. An audiogram input apparatus includes: an input receiver configured to receive a touch input from a user; a data processor configured to generate an audiogram corresponding to the touch input; and a display unit configured to display the generated audiogram. | 10-16-2014 |
20140307902 | HEARING APPARATUS INCLUDING COIL OPERABLE IN DIFFERENT OPERATION MODES - A hearing apparatus includes a coil and a coil operation mode selector configured to select either a first coil operation mode for communicating with a wireless communication terminal, or a second coil operation mode for wirelessly charging a battery of the hearing apparatus. | 10-16-2014 |
20140330160 | HEARING APPARATUS AND METHOD FOR MEASURING DISTANCE BETWEEN EARDRUM AND HEARING APPARATUS - A hearing apparatus and method for measuring a distance between an eardrum and the hearing apparatus are provided. The hearing apparatus may include a signal output unit configured to output a first measurement signal, a signal identification unit configured to receive a second measurement signal, and a distance determination unit configured to determine the distance between the user's eardrum and the hearing apparatus. | 11-06-2014 |
20150049876 | HEARING DEVICE AND METHOD FOR FITTING HEARING DEVICE - A hearing device and a method for fitting the hearing device are provided. The method for fitting a monaural hearing device involve obtaining audiograms of both ears, and adjusting an amplification gain based on the audiograms of both ears, in which the audiograms comprise an audiogram of a first ear for wearing the monaural hearing device and an audiogram of a second ear not wearing the monaural hearing device. | 02-19-2015 |
20150078602 | HEARING LOSS COMPENSATION APPARATUS INCLUDING EXTERNAL MICROPHONE - A hearing loss compensation apparatus includes a microphone configured to collect an ambient sound and generate an audio signal based on the collected ambient sound. A hearing loss compensation apparatus body inserted into an ear of a hearing impaired patient is configured to compensate for the audio signal based on auditory characteristics of the hearing impaired patient. The hearing loss compensation apparatus body is further configured to output the audio signal in a direction of an eardrum of the hearing impaired patient. A connection member is configured to connect the microphone to the hearing loss compensation apparatus body and fix a position of the microphone to be inside an ear canal of the hearing impaired patient. | 03-19-2015 |
20150124984 | HEARING DEVICE AND EXTERNAL DEVICE BASED ON LIFE PATTERN - Disclosed is a hearing device that may classify sound environment based on a life pattern, and categorize sound information using a sound environment category set based on the life pattern, and control an output of the sound information based on the classified sound environment. | 05-07-2015 |
20150162770 | APPARATUS AND METHOD FOR MANAGING HEARING DEVICE - An apparatus for managing a hearing device through interoperation with a control terminal is provided. The apparatus may control, through an external control terminal, constituent elements configured to perform various operations of drying, cleaning, sterilizing, charging, and setting the hearing device. | 06-11-2015 |
20150163585 | MOBILE TERMINAL AND METHOD OF PAIRING MOBILE TERMINAL WITH HEARING APPARATUS - Disclosed are a terminal and a method of pairing a terminal with a hearing apparatus. The method of pairing a terminal involves verifying whether a hearing apparatus is in contact with a terminal, and pairing the terminal with the hearing apparatus in response to a determination that the hearing apparatus is in contact with the terminal. | 06-11-2015 |
20150181353 | HEARING AID FOR PLAYING AUDIBLE ADVERTISEMENT OR AUDIBLE DATA - Disclosed are a hearing aid and a related method. In an example, the hearing aid receives a sound input, stores an audible advertisement, generates a sound signal based on the sound input and the stored audible advertisement, and outputs the generated sound signal. | 06-25-2015 |
20150198582 | DIAGNOSTIC METHOD OF CARDIOVASCULAR DISEASE - Biological metabolites LysoPC (18:0), LysoPC (20:3), fatty acid (16:1), fatty acid (18:0), fatty acid (18:1), fatty acid (18:2) and fatty acid (22:6) according to the present disclosure allow for simple and accurate diagnosis of a cardiovascular disease since their level in the blood of a subject increases or decreases if the subject has a cardiovascular disease such as myocardial infarction or angina. In addition, whereas the existing biomarkers can diagnose only whether myocardial infarction occurs or not, the biological metabolites according to the present disclosure can diagnose not only myocardial infarction but also unstable angina occurring prior to the onset of myocardial infarction stage by stage. | 07-16-2015 |
20150242608 | CONTROLLING INPUT/OUTPUT DEVICES - An electronic device is provided processor configured to: receive a biological signal of a user; detect whether the electronic device is attached to or detached from the user based on at least the biological signal; and control an I/O device operationally connected to the electronic device based on whether the electronic device is attached to or detached from the user. | 08-27-2015 |
Patent application number | Description | Published |
20090247758 | Novel Quinoline Compound, and Composition Containing Centipede Extract or Compounds Isolated Therefrom for Prevention and Treatment of Cardiovascular Disease - The present invention relates to a composition for the prevention and treatment of cardiovascular diseases containing the novel quinoline compound, the centipede extracts or compounds isolated from the extracts. The novel quinoline compound, the centipede extracts or a quinoline compound and a phenol compound isolated from the extracts of the invention exhibit excellent LDL-antioxidant activity, ACAT inhibiting activity, and anti-inflammatory activities, so that they can be included as an effective ingredient in a composition for the prevention and treatment of cardiovascular disease including hyperlipidemia, atherosclerosis, coronary heart disease, and myocardial infarction mediated by LDL-oxidation, cholesteryl ester synthesis and accumulation, and inflammation. | 10-01-2009 |
20100056780 | NOVEL O-ACYLOXIME DERIVATIVES, PREPARATION METHOD THEREOF, AND PHARMACEUTICAL COMPOSITION CONTAINING THE SAME FOR PREVENTION AND TREATMENT OF CARDIOVASCULAR DISEASE - The present invention relates to novel O-acyloxime derivatives, a preparation method thereof and a pharmaceutical composition comprising the same for prevention and treatment of cardiovascular disease. | 03-04-2010 |
20100291248 | Compositions for Preventing and Treating Obesity, Hyperlipidemia, Atherosclerosis, Fatty Liver, Diabetes or Metabolic Syndrome Containing Extracts of Glycine Max Leaves or Fractions Isolated from the Same as an Active Ingredient - The present invention relates to compositions for preventing and treating obesity, hyperlipidemia, atherosclerosis, fatty liver, diabetes or metabolic syndrome containing extracts of | 11-18-2010 |
20120220626 | NOVEL QUINOLINE COMPOUND, AND COMPOSITION CONTAINING CENTIPEDE EXTRACT OR COMPOUNDS ISOLATED THEREFROM FOR PREVENTION AND TREATMENT OF CARDIOVASCULAR DISEASE - The present invention relates to a composition for the prevention and treatment of cardiovascular diseases containing the novel quinoline compound, the centipede extracts or compounds isolated from the extracts. The novel quinoline compound, the centipede extracts or a quinoline compound and a phenol compound isolated from the extracts of the invention exhibit excellent LDL-antioxidant activity, ACAT inhibiting activity, and anti-inflammatory activities, so that they can be included as an effective ingredient in a composition for the prevention and treatment of cardiovascular disease including hyperlipidemia, atherosclerosis, coronary heart disease, and myocardial infarction mediated by LDL-oxidation, cholesteryl ester synthesis and accumulation, and inflammation. | 08-30-2012 |
Patent application number | Description | Published |
20100128514 | Semiconductor memory devices having bit lines - A semiconductor device includes a bit line connected to a plurality of memory cells in a memory block and a sense amplifier having a first node connected to the bit line and a second node, which is not connected to any bit line. The second node has a capacitive load less than that of the bit line. The sense amplifier amplifies a first data using a voltage difference between the first node and the second node caused by a charge sharing operation, and a second data using a capacitive mismatch between the first node and the second node. | 05-27-2010 |
20130003477 | SEMICONDUCTOR MEMORY DEVICE INCLUDING SPARE ANTIFUSE ARRAY AND ANTIFUSE REPAIR METHOD OF THE SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device including an antifuse cell array and a spare antifuse cell array are provided. An antifuse cell array includes a first set of antifuse cells arranged in a first direction and each one of the first set of antifuse cells is connected to a corresponding one of first through nth word lines. The spare antifuse cell array includes a first spare set of antifuse cells arranged in the first direction and each one of the first spare set of antifuse cells is connected to a corresponding one of first through kth spare word lines. A first operation control circuit is configured to program antifuses of the antifuse cell array and the spare antifuse cell array, and to read a status of each of the antifuses. The first operation control circuit is commonly connected to the first set of antifuse cells and the first spare set of antifuse cells. | 01-03-2013 |
20130258748 | FUSE DATA READING CIRCUIT HAVING MULTIPLE READING MODES AND RELATED DEVICES, SYSTEMS AND METHODS - A fuse data reading circuit is configured to read fuse data in multi-reading modes. The fuse data may be stored in a fuse array that includes a plurality of fuse cells configured to store fuse data. The fuse data reading circuit may include a sensing unit configured to sense the fuse data stored in the fuse cells of the fuse array, and a controller configured to control an operation of reading the fuse data stored in the fuse cells. The controller sets different sensing conditions for sensing the fuse data according to an operation period during the fuse data reading operation to read the fuse data. Methods include operations and use of the fuse data reading circuit. | 10-03-2013 |
20130265815 | METHOD OF READING DATA STORED IN FUSE DEVICE AND APPARATUSES USING THE SAME - A method for reading data stored in a fuse device included in a memory device including a memory cell array is provided. The method comprises reading trimming data of the fuse device, wherein the trimming data is related to trimming a level of voltage or a level of current used for an operation of the memory device; and after the reading the trimming data, reading defective cell address data of the fuse device, wherein the defective cell address data is related to defective cells in the memory cell array. | 10-10-2013 |
20130294140 | ANTI-FUSE CIRCUIT IN WHICH ANTI-FUSE CELL DATA IS MONITORED, AND SEMICONDUCTOR DEVICE INCLUDING THE SAME - An anti-fuse circuit in which anti-fuse program data may be monitored outside of the anti-fuse circuit and a semiconductor device including the anti-fuse circuit are disclosed. The anti-fuse circuit includes an anti-fuse array, a data storage circuit, and a first selecting circuit. The anti-fuse array includes one or more anti-fuse blocks including a first anti-fuse block having a plurality of anti-fuse cells and the anti-fuse array is configured to store anti-fuse program data. The data storage circuit is configured to receive and store the anti-fuse program data from the anti-fuse array through one or more data buses. The first selecting circuit is configured to output anti-fuse program data of a selected anti-fuse block of the one or more anti-fuse blocks in response to a first selection signal. | 11-07-2013 |
20130322149 | MEMORY DEVICE, METHOD OF OPERATING THE SAME, AND ELECTRONIC DEVICE HAVING THE MEMORY DEVICE - A memory device includes a memory cell array and a fuse device. The fuse device includes a fuse cell array and a fuse control circuit. The fuse cell array includes a first fuse cell sub-array which stores first data associated with operation of the fuse control circuit, and a second fuse cell sub-array which stores second data associated with operation of the memory device. The fuse control circuit is electrically coupled to the first and second fuse cell sub-arrays, and is configured to read the first and second data from the first and second fuse cell sub-arrays, respectively. | 12-05-2013 |
20140078842 | POST PACKAGE REPAIRING METHOD, METHOD OF PREVENTING MULTIPLE ACTIVATION OF SPARE WORD LINES, AND SEMICONDUCTOR MEMORY DEVICE INCLUDING FUSE PROGRAMMING CIRCUIT - Provided is a method of preventing simultaneous activation of redundancy memory line or spare word lines, the method including: programming a fail address of a memory line determined to be defective; reprogramming the fail address if a first spare line for the memory line is determined to be defective; storing additional information with respect to the reprogrammed fail address; and activating a second spare line and inactivating the first spare line, referring to the additional information. | 03-20-2014 |
20140104921 | SEMICONDUCTOR MEMORY DEVICE HAVING OTP CELL ARRAY - Provided is a semiconductor memory device. The semiconductor includes a One Time Programmable (OTP) cell array, a converging circuit and a sense amplifier circuit. The OTP cell array includes a plurality of OTP cells connected to a plurality of bit lines, each bit line extending in a first direction. The converging includes a common node contacting a first bit line and a second bit line. The sense amplifier circuit includes a sense amplifier connected to the common node, the sense amplifier configured to amplify a signal of the common node. | 04-17-2014 |
20140104966 | DATA LOADING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE COMPRISING SAME - A data loading circuit comprises a non-volatile memory configured to store non-volatile data and output a serial data signal based on the stored non-volatile data in response to a power-up operation, a deserializer configured to receive the serial data signal and output multiple data bits at intervals of a unit period based on the received serial data signal, a load controller configured to generate multiple loading selection signals that are sequentially activated one-by-one at each interval of the unit period, and a loading memory unit configured to sequentially store the data bits at each interval of the unit period in response to the loading selection signals. | 04-17-2014 |
20150162103 | DATA LOADING CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE COMPRISING SAME - A data loading circuit comprises a non-volatile memory configured to store non-volatile data and output a serial data signal based on the stored non-volatile data in response to a power-up operation, a deserializer configured to receive the serial data signal and output multiple data bits at intervals of a unit period based on the received serial data signal, a load controller configured to generate multiple loading selection signals that are sequentially activated one-by-one at each interval of the unit period, and a loading memory unit configured to sequentially store the data bits at each interval of the unit period in response to the loading selection signals. | 06-11-2015 |
Patent application number | Description | Published |
20090174410 | METHOD AND APPARATUS FOR CONTROLLING BATTERY - An apparatus for controlling a battery includes a capacitor for charging a voltage when the apparatus is on and discharging a voltage when the apparatus is off, a discharging circuit for discharging the voltage charged in the capacitor; a first switching unit for connecting or disconnecting the capacitor to/from a predetermined power source for the purpose of charging of the capacitor; a second switching unit for connecting or disconnecting the capacitor to/from the discharging unit; a voltage measuring unit for measuring a voltage charged in the capacitor; and a controller for calculating a power-off duration time according to the measured voltage. This apparatus may continuously calculate a power-off duration time of a battery pack. | 07-09-2009 |
20110306353 | CHANNEL ALLOCATION DEVICE AND METHOD USING WIRELESS ACCESS IN VEHICULAR ENVIROMENTS - A device for allocating a channel by using wireless access in a vehicular environment in which an onboard unit is provided in a vehicle and at least one roadside unit is provided, receives a service announcement message from at least one roadside unit, uses the service announcement message to generate an available service table, determines whether the available service table has roadside unit entries for transmitting the service announcement message, and if so, compares average RSSI provided by the roadside units to select a roadside unit to access, selects a channel that corresponds to the service provider ID with the highest priority from among the service provided by the selected roadside unit, and assigns the selected channel as a service channel to exchange information with the roadside unit. | 12-15-2011 |
20120099541 | APPARATUS AND METHOD FOR OPERATING MULTI-CHANNEL BASED ON WIRELESS ACCESS IN VEHICULAR ENVIRONMENTS - In a vehicle communication system, a multi channel operation apparatus for communication of a vehicle or a road side base station operates a multi channel in one physical layer and differentially transmits a frame through a corresponding channel according to a user priority order value of a frame to transmit. | 04-26-2012 |
20120268069 | METHOD AND SYSTEM FOR SETTING SEQUENTIAL IDENTIFICATION TO MULTI-SLAVE IN BATTERY PACK - Disclosed is a method for setting sequential ID to a multi-slave BMS in a battery pack, the battery pack including N (N: natural number of 2 or more) slave BMSs having sequential physical locations to control a battery module containing at least one battery and a main BMS to control the N slave BMSs. | 10-25-2012 |
20120268070 | APPARATUS AND METHOD FOR CONTROLLING CONNECTION OF BATTERY PACKS - Disclosed is an apparatus for controlling the connection of a plurality of battery packs including a switching unit provided on a charge/discharge path of each battery pack to selectively open and close the charge/discharge path, a first control unit provided for each battery pack to determine the state of charge (SOC) of each battery pack and control the opening/closing of the switching unit, and a second control unit to receive the determined SOC of each battery pack from the first control unit, group battery packs having a predetermined range of SOCs, select a group containing a largest number of battery packs, connect the battery packs of the selected group in parallel, charge or discharge the parallel-connected battery packs so that a difference in SOC between the parallel-connected battery packs and the non-connected battery pack falls within a predetermined range, and connect the non-connected battery pack thereto in parallel. | 10-25-2012 |
20130253715 | POWER STORAGE SYSTEM HAVING MODULARIZED BMS CONNECTION STRUCTURE AND METHOD FOR CONTROLLING THE SYSTEM - A power storage system includes n number of slave BMSs for transmitting data associated with an electric characteristic value of battery cells, included in battery modules managed by the slave BMSs, through slave communication networks; m number of master BMSs for primarily processing the data associated with an electric characteristic value of battery cells, transmitted through the slave communication networks, and transmitting the primarily processed data through a master communication network; and a super master BMS for secondarily processing the data transmitted through the master communication network. Since the data transmitted from each slave BMS are processed in a master BMSs, the amount of data loaded on a communication line may decrease. Therefore, even though the capacity of a power storage system increases, rapid data collection and data control may be achieved. | 09-26-2013 |
20130343486 | APPARATUS AND METHOD FOR GENERATING MULTIBAND RADIO FREQUENCY SIGNALS IN MARITIME WIRELESS COMMUNICATION - Disclosed herein are a method and apparatus for generating multiband Radio Frequency (RF) signals in maritime wireless communication. The apparatus includes a baseband conversion unit, a phase compensation unit, a Direct Current (DC) offset compensation unit, and an RF transmission unit. The baseband conversion unit converts RF signals corresponding to a baseband modulation signal having a negative frequency and a baseband modulation signal having a positive frequency into baseband signals, respectively. The phase compensation unit eliminates the images of multiband signals so as to correspond to the baseband signals. The DC offset compensation unit compensates the baseband modulation signals for DC offsets using the multiband signals from which the images have been eliminated The RF transmission unit generates the RF signals using the signals which have been compensated for the DC offsets, and sends the RF signals via an antenna. | 12-26-2013 |
20140018066 | MARITIME WIRELESS COMMUNICATION METHOD AND APPARATUS - Disclosed herein are a maritime communication apparatus and method. The maritime communication apparatus includes a land-based network communication unit, a maritime network communication unit, and a communication control unit. The land-based network communication unit communicates with a land-based communication network. The maritime network communication unit communicates with a maritime communication network. The communication control unit links the communication of the land-based network communication unit with the communication of the maritime network communication unit in accordance with a destination address of data provided by any one of the land-based network communication unit and the maritime network communication unit. | 01-16-2014 |
20140091770 | SYSTEM AND METHOD FOR ALLOCATING IDENTIFIER TO MULTI-BMS - Disclosed is a multi-BMS identifier allocation system. The multi-BMS identifier allocation system according to the present invention comprises a master BMS and N slave BMSs (N is an integer greater than or equal to 2) which are connected to a series communication network and a parallel communication network, wherein the master BMS comprises at least two first and second master communication channels which form a communication interface with the series communication network and selectively output a forward or backward enabling signal and allocates unique communication identifiers to the slave BMSs through the parallel communication network, and the first to Nth slave BMSs start enabling in response to the forward or backward enabling signal received through the series communication network, are allocated the identifiers from the master BMS through the parallel communication network, and output an enabling signal to an adjacent slave BMS along a transmission direction of the enabling signal. | 04-03-2014 |
20140222359 | APPARATUS AND METHOD FOR MANAGING BATTERY APPLICATION ENVIRONMENT AND USAGE HISTORY - Disclosed is an apparatus and method for managing a battery that may manage a surrounding environment and a usage history of the battery. The battery management apparatus senses a temperature of an environment to which the battery is exposed, and stores a period of time during which the battery is exposed to a high temperature when the sensed temperature corresponds to a preset first or second area. In this instance, the battery management apparatus may determine whether the battery is simply exposed to the high temperature or the battery is charged or discharged while exposed to the high temperature, and store a usage time together. According to the present disclosure, information about a time domain affecting the life or performance of the battery may be calculated in consideration of the temperature environment to which the battery is exposed. | 08-07-2014 |
Patent application number | Description | Published |
20100251754 | DEGASSING CONTAINER FOR REFRIGERATOR - Provided is a degassing container for a refrigerator in which a portion of air within a storage space is forcedly discharged to allow the storage space to become a low pressure state. The degassing container includes a case, a door, a gasket, a pressing part, and a degassing adjustment part. The case has an opened side. The door selectively shields the opened side of the case. The gasket is interposed between the door and the case and elastically deformed and closely attached when the door is shielded. The pressing part is provided in the door and the case and selectively closely attaches the door by a rotation operation. The degassing adjustment part selectively enters and exits air within the case by operating the pressing part. Therefore, the refrigerator has improved storage performance. | 10-07-2010 |
20110271703 | REFRIGERATOR - A refrigerator is provided. The refrigerator includes a compressor, a condenser, an expansion valve, an evaporator, a bypass pipe, and a valve device. The condenser condenses refrigerant discharged from the compressor, and the expansion valve expands the refrigerant condensed in the condenser. The evaporator evaporates the refrigerant expanded in the expansion valve, and the bypass pipe allows the refrigerant discharged from the compressor to move toward an inlet of the evaporator. The valve device allows the refrigerant discharged from the compressor to selectively move toward the bypass pipe or the condenser. The valve device comprises an inlet, a first outlet, and a second outlet. The refrigerant discharged from the compressor flows into the inlet. The refrigerant is discharged toward the condenser through the first outlet, and is discharged toward the bypass pipe through the second outlet. The first outlet has a diameter larger than that of the second outlet. | 11-10-2011 |
20110289957 | REFRIGERATOR AND DEGASSING CONTAINER FOR REFRIGERATOR - The present invention relates to a refrigerator and a degassing container of the refrigerator which compulsorily degass a portion of air inside a space where foods are stored to the outside by a degassing means together with deformation of a gasket when a door is closely adhered. The present invention includes a degassing container of a refrigerator comprising a case whose one side is opened; a door which shields the opened one side of the case selectively; a gasket interposed between the door and case and elastically deformed to be closely adhered when the door is shielded; a degassing means provided on the door and exhausting air inside the case to the outside when the gasket is compressively deformed; and a release means provided on the door and flowing external air into an inner side of the case when the door is opened. According to the present invention, the storage performance is improved. | 12-01-2011 |