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Jong-Kook
Jong Kook Han, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20100062794 | SYSTEM AND METHOD FOR PROVIDING FRIEND'S LOCATION INFORMATION - A system and method of providing friend location information is provided. More particularly, when a friend appears in a region desired by a user, it is possible to track a travel route of the friend and display for the user a map where the travel route is marked and thereby enable the user to understand preferred places of the friend. | 03-11-2010 |
| 20110131092 | METHOD AND SYSTEM FOR ADVERTISEMENT OF MAP USING VIRTUAL POI (POINT OF INTEREST) - An advertisement method and a system of a map using a virtual POI are disclosed. An advertisement system of a map using a virtual POI according to one embodiment of the present invention comprises a map database including map data; a membership database including advertisement display configuration information; a virtual POI database where stored are information about virtual advertisement POI and advertisement location which is the location of the virtual advertisement POI; and a virtual world generation module, generating an image map based on the map data and searching the image map for a virtual advertisement POI associated with a location which can be displayed on the image map and corresponding to the advertisement display configuration information; and displaying the virtual advertisement POI on the advertisement location of the image map. | 06-02-2011 |
Jong Kook Lee, Simi Valley, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080222349 | IEEE 1394 INTERFACE-BASED FLASH DRIVE USING MULTILEVEL CELL FLASH MEMORY DEVICES - A flash drive and method of transferring data from a system to a flash drive. The flash drive includes a casing, a plurality of flash memory devices within the casing, each of the flash memory devices having multilevel cells, an IEEE 1394 interface controller within the casing, coupled to the flash memory devices, and interfacing with the flash memory devices for interleaved multichannel access to and from at least two of the flash memory devices, and at least one IEEE 1394 interface connector projecting from the casing for interfacing the flash memory devices with a system through the controller. The method entails coupling a plurality of multilevel cell flash memory devices to a system through an IEEE 1394 interface controller and at least one IEEE 1394 interface connector, and performing interleaved multichannel access to and from at least two of the flash memory devices. | 09-11-2008 |
Jong Kook Lim, Chuncheon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110297743 | HIGH-SPEED AUTOMATIC FIRE NET-BASED FIRE INSTRUCTION CONTROL SYSTEM FOR SHORT-RANGE ANTI-AIRCRAFT GUN - A high-speed automatic fire net-based fire instruction control system for a short-range anti-aircraft gun is provided. More particular, the present invention relates to a system, in which when a short-range anti-aircraft gun gunner calibrates values indicated on equipment and follows instructions without personally viewing a flying object that has infiltrated at low altitude, a tracking and automatic fire net is constructed, and the gunner follows fire instructions, thus allowing gunners to easily cope with targets anywhere regardless of the location, such as an anti-aircraft defensive position or a contact area, as long as the targets appear on a detection radar even in unfavorable weather or at night which forbids the targets from being detected and identified with eyes. | 12-08-2011 |
Jong Kook Park, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20120125879 | METHOD FOR FABRICATING CAPACITOR - A method for fabricating a capacitor includes: forming a first mold layer having a first through hole on a semiconductor substrate; forming a hole blocking layer filling and blocking an entrance of the first through hole; forming a second mold layer on the hole blocking layer and the first mold layer; forming a second through hole passing through the second mold layer and aligned with the first through hole; selectively removing the hole blocking layer exposed to the second through hole; forming a storage node along a profile of the first and second through holes; and selectively removing a portion of the first and second mold layers. | 05-24-2012 |
Jong-Kook Kim, Chungcheongnam-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080225598 | Flash memory and method for checking status register by block unit - Provided is a test method of a NAND flash memory. The method includes programming a page of a selected memory block in the flash memory; accumulating a program result of the page; and repeating the programming of other pages and the accumulating of the program result of the other pages until all pages in the selected memory block are programmed. | 09-18-2008 |
Jong-Kook Kim, Seoul KR
| Patent application number | Description | Published |
|---|---|---|
| 20110289798 | FUNCTIONAL SHOE - Disclosed is a functional shoe, comprising a foot arch support, wherein said foot arch support includes a support body accommodated and fixed in a shoe body, a slider tightened to the support body by a screw, and a contact member which is coupled to the top of the slider and projects toward the inside of the shoe to contact the arch of the foot. The slider moves in the upward and downward directions by means of the rotation of the contact member. | 12-01-2011 |
Jong-Kook Kim, Hwaseong-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090272974 | Interposer chip and multi-chip package having the interposer chip - An interposer chip may include an insulating substrate, conductive patterns, and a test pattern. The conductive patterns may be formed on the insulating substrate. Further, the conductive patterns may be electrically connected to conductive wires. The test pattern may be connected to the conductive patterns. A test current for testing an electrical connection between the conductive patterns and the conductive wires may flow through the test pattern. Thus, the interposer chip may have the test pattern connected to the conductive patterns, so that the test current may flow to the test pattern through the conductive wires and the conductive patterns. As a result, an electrical connection between the conductive wires and the conductive patterns may be identified based on the test current supplied to the test pattern. | 11-05-2009 |
Jong-Kook Kim, Suwon City KR
| Patent application number | Description | Published |
|---|---|---|
| 20100203683 | SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURE THEREOF - A method for manufacturing a semiconductor package system includes: providing a die having a plurality of contact pads; forming a leadframe having a plurality of lead fingers with flat tops of predetermined lengths, the plurality of lead fingers having a fine pitch and each having a trapezoidal cross-section; attaching a plurality of bumps to the plurality of lead fingers, the plurality of bumps on the tops, extending beyond the widths of the trapezoidal cross-sections, and clamping down on the two sides of each of the plurality of lead fingers; attaching a plurality of bond wires to the plurality of contact pads; attaching the plurality of bond wires to the plurality of bumps; and forming an encapsulant over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant leaving lower surfaces of the plurality of lead fingers exposed. | 08-12-2010 |
| 20100225008 | WIRE BOND INTERCONNECTION - A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal. | 09-09-2010 |
| 20110169149 | SEMICONDUCTOR PACKAGE SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF - A semiconductor package system, and method of manufacturing thereof, includes: a die having a contact pad; a lead finger having a substantially trapezoidal cross-section; a bump clamped on a top and a side of the lead finger, the bump connected to the contact pad; and an encapsulant over the lead finger and the die, the encapsulant with a bottom of the lead finger exposed. | 07-14-2011 |
| 20110266700 | WIRE BOND INTERCONNECTION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of a semiconductor package includes: providing a substrate; mounting a semiconductor die on the substrate, the semiconductor die having a die pad; mounting a lead finger on the substrate; attaching a support pedestal on sides of the lead finger; and attaching a wire interconnection between the die pad and the support pedestal, the wire interconnection having a ball bond on the die pad and a stitch bond on the support pedestal. | 11-03-2011 |
| 20110285000 | SEMICONDUCTOR SYSTEM WITH FINE PITCH LEAD FINGERS AND METHOD OF MANUFACTURING THEREOF - A semiconductor package system, and method of manufacturing thereof, includes: an electrical substrate having a contact pad; a support structure having a lead finger thereon; a bump on the lead finger, the bump clamped on a top and a side of the lead finger and connected with the contact pad; and an encapsulant over the lead finger and the electrical substrate. | 11-24-2011 |
Jong-Kook Lee, Kyeongsan-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20110296663 | LIQUID CRYSTAL DISPLAY MODULE WITH REFLECTOR HAVING RAISED LAMP GUIDE - A liquid crystal display module displays an image on a liquid crystal panel. The liquid crystal module includes a liquid crystal panel and a backlight assembly. The backlight assembly includes a reflecting sheet having a raised portion that receives a light source and supports a diffusing sheet and/or optical sheet positioned between the liquid crystal panel and the light source. | 12-08-2011 |
Jong-Kook Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090095922 | METHOD OF REPAIRING A POLYMER MASK - A method of repairing defects to a patterned polymer mask for a photolithography process is described, illustrated, and claimed. Generally, there are two types of defects to a polymer mask, which are an ink spot on a transparent polymer substrate and an ink void in a patterned area. The ink spot is repaired by an effective ablation by a laser that does not substantially affect a transparency of the polymer substrate. The ink void is repaired by various embodiments using laser-assisted touch-up processes, wherein the laser-assisted touch-up restores the void to block UV light during a photolithography exposure. | 04-16-2009 |