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Jong-Bong
Jong-Bong Lee, Chunan-City KR
| Patent application number | Description | Published |
|---|---|---|
| 20090211515 | METHOD FOR SOLID-STATE SINGLE CRYSTAL GROWTH - By controlling the average size of matrix grains of polycrystalline bodies to more than a critical size at which an abnormal, exaggerated or discontinuous grain growth ends, and less than twice the critical size, large single crystals enough for practical use may be made even without occurring abnormal grain growth in polycrystalline bodies only through a heat treatment process without using a melting process and a special apparatus, thereby allowing the mass production of the large single crystals at low costs with high reproduction possibility. | 08-27-2009 |
Jong-Bong Lee, Kyungsangbook-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20110174869 | JOINING METHOD OF HIGH CARBON STEEL FOR ENDLESS HOT ROLLING AND THE APPARATUS THEREFOR - An endless hot rolling material shear-joining method capable of threading hot rolling materials in a finish rolling process without strip breakage by controlling joining conditions for the hot rolling materials in an endless hot rolling process for high carbon steel, and an endless hot rolling plant therefor are disclosed. The shear-joining method for endless hot rolling materials of high carbon steel includes shear-joining high carbon steel metal bars comprising, in terms of weight %, 0.30% to 1.20% C, inevitable impurities, and balance Fe, or comprising 0.15% to 1.5% C containing at least one of Cr, Ni, Mo, V, Ti, W, B, Nb, and Sb, inevitable impurities, and balance Fe, such that a joined surface of the joined metal bars is formed to be inclined in a thickness direction of the metal bars, in a hot rolling plant by a joiner adapted to join the metal bars after overlapping tail part of a leading one of the metal bar and top part of a trailing metal bar. | 07-21-2011 |
Jong-Bong Park, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20090020820 | CHANNEL-STRESSED SEMICONDUCTOR DEVICES AND METHODS OF FABRICATION - In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent NMOS device, and treating the SM layer formed over the NMOS and PMOS devices to induce tensile stress in a channel region of the NMOS device. | 01-22-2009 |
| 20110006358 | Al-doped charge trap layer, non-volatile memory device and methods of fabricating the same - Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film. | 01-13-2011 |
Jong-Bong Park, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20090230445 | Magnetic Memory Devices Including Conductive Capping Layers - A magnetic memory device includes a first magnetic layer having opposing sidewalls, a tunnel barrier layer on the first magnetic layer, the tunnel barrier layer having a top surface and having opposing sidewalls aligned with the opposing sidewalls of the first magnetic layer, and a second magnetic layer on the tunnel barrier layer, the second magnetic layer having a bottom surface that is narrower than the top surface of the tunnel barrier layer and opposing sidewalls that are spaced apart from the opposing sidewalls of the tunnel barrier layer. A conductive capping layer having opposing sidewalls aligned with the opposing sidewalls of the second magnetic layer is on the second magnetic layer. | 09-17-2009 |