| Patent application number | Description | Published |
|---|
| 20080258275 | CONTROLLING WARPING IN INTEGRATED CIRCUIT DEVICES - Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. | 10-23-2008 |
| 20080311700 | Plastic overmolded packages with mechancially decoupled lid attach attachment - The specification describes a lidded MCM IC plastic overmolded package with a chimney-type heat sink. The lid is mechanically decoupled from the chimneys by a compliant conductive polymer plug. | 12-18-2008 |
| 20090291321 | Whisker-free lead frames - A method of fabricating an interconnection between a region of copper material and a conducting region is disclosed. The method includes a step of forming a region of tin material and a step of forming a region of nickel material. The method also includes a step of melting the tin material to induce formation of a nickel/tin/copper intermetallic composition at an interface between the region of copper material and the conducting region. The region of tin material and the region of nickel material define the interface between the region of copper material and the conducting region. | 11-26-2009 |
| 20090311853 | CONTROLLING WARPING IN INTEGRATED CIRCUIT DEVICES - Techniques for integrated circuit device fabrication are provided. In one aspect, an integrated circuit device comprises a base, at least one die attached to the base, and a counterbalancing layer on at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. In another aspect, warping of an integrated circuit device comprising at least one die attached to a base is controlled by applying a counterbalancing layer to at least a portion of at least one side of the base adapted to compensate for at least a portion of a thermal expansion difference existing between the base and the die. | 12-17-2009 |
| 20100201000 | BOND PAD SUPPORT STRUCTURE FOR SEMICONDUCTOR DEVICE - According to certain embodiments, integrated circuits are fabricated using brittle low-k dielectric material to reduce undesired capacitances between conductive structures. To avoid permanent damage to such dielectric material, bond pads are fabricated with support structures that shield the dielectric material from destructive forces during wire bonding. In one implementation, the support structure includes a passivation structure between the bond pad and the topmost metallization layer. In another implementation, the support structure includes metal features between the topmost metallization layer and the next-topmost metallization layer. In both cases, the region of the next-topmost metallization layer under the bond pad can have multiple metal lines corresponding to different signal routing paths. As such, restrictions on the use of the next-topmost metallization layer for routing purposes are reduced compared to prior-art bond-pad support structures that require the region of the next-topmost metallization layer under the bond pad to be a single metal structure. | 08-12-2010 |
| 20100300741 | ALUMINUM BOND PADS WITH ENHANCED WIRE BOND STABILITY - An electronic device bond pad includes an Al layer located over an electronic device substrate. The Al layer includes an intrinsic group 10 metal located therein. | 12-02-2010 |
| 20100319967 | INHIBITION OF COPPER DISSOLUTION FOR LEAD-FREE SOLDERING - A device fabrication method, according to which a tin-copper-alloy layer is formed adjacent to a copper-plated pad or pin that is used to electrically connect the device to external wiring. Advantageously, the tin-copper-alloy layer inhibits copper dissolution during a solder reflow process because that layer is substantially insoluble in liquid Sn—Ag—Cu (tin-silver-copper) solder alloys under typical solder reflow conditions and therefore shields the copper plating from direct physical contact with the liquefied solder. | 12-23-2010 |
| 20100319987 | LEAD FRAME DESIGN TO IMPROVE RELIABILITY - An electronic device package | 12-23-2010 |
| 20110006389 | SUPPRESSING FRACTURES IN DICED INTEGRATED CIRCUITS - A semiconductor device has a singulated die having a substrate and a die edge. An interconnect dielectric layer is located on the substrate, and integrated circuit has interconnections located within the interconnect dielectric layer. A trench is located in the interconnect dielectric layer and between a seal ring and a remnant of the interconnect dielectric layer. The seal ring is located within the interconnect dielectric layer and between the trench and the integrated circuit, with the remnant of the interconnect dielectric layer being located between the trench and the edge of the die. | 01-13-2011 |
| 20110006415 | SOLDER INTERCONNECT BY ADDITION OF COPPER - A method of forming an electronic device provides an electronic device substrate having a solder bump pad located thereover. A nickel-containing layer is located over the solder bump pad. A copper-containing layer is formed on the nickel-containing layer prior to subjecting the electronic device to a reflow process. | 01-13-2011 |
| 20110038134 | PREVENTING OR MITIGATING GROWTH FORMATIONS ON METAL FILMS - The disclosure, in one aspect, provides an electronics package | 02-17-2011 |
| 20110155418 | MITIGATION OF WHISKERS IN SN-FILMS - An electronic device includes a metallic conducting lead having a surface. A pre-solder coating over the surface consists essentially of tin and one or more dopants selected from Al or a rare earth element. | 06-30-2011 |
| 20110163441 | PB-FREE SOLDER BUMPS WITH IMPROVED MECHANICAL PROPERTIES - A method of forming a semiconductor device is disclosed. A semiconductor substrate is provided that has a first contact and an undoped electroplated lead-free solder bump ( | 07-07-2011 |
