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John Kim
John Kim, Los Angeles, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090109638 | Modular Powerline Adapters and Methods of Use - Embodiments of modular powerline adapters and their methods of use are generally described herein. An article to transmit and receive signals through an electrical power distribution network comprises: a first module and a second module, wherein the first module comprises an electrical plug to electrically couple to an electrical power outlet receptacle of the electrical power distribution network. The first module and second module further comprise signal connectors, and each module further comprises a housing and a plurality of electrical components located within each housing. The plurality of electrical components transmit and/or receive digital information through the electrical power distribution network. The first and second module's housing comprise mechanical attachment mechanisms to rigidly couple one module to another. Other embodiments may be described and claimed. | 04-30-2009 |
| 20090251127 | Power Management Connection Devices And Related Methods - Embodiments of power management connection devices and related methods are described herein. Other embodiments and related methods are also disclosed herein | 10-08-2009 |
| 20100259097 | MODULAR POWERLINE ADAPTERS AND METHODS OF USE - Embodiments of modular powerline adapters are generally described herein. Other embodiments, examples, and related methods are also described herein. | 10-14-2010 |
John Kim, Portland, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20100242069 | SYSTEM AND METHOD FOR CREATING PERSONALIZED ADVERTISEMENT AND PERSONALIZING PRODUCTS WITH INTERACTIVE GRAPHICAL USER INTERFACE EMBEDDED IN ADVERTISEMENT - Systems, methods, and computer storage media for creating a personalized advertisement. A web development platform prepares an interactive user interface including a personalization area; prepares an advertisement; embeds the user interface in the advertisement; and sends the advertisement with the embedded interactive user interface to a device via a network to thereby enable a user of the device to use the embedded interface for personalization of the personalization area. When the user uploads an image file to be displayed on the personalization area, the platform causes a process to produce a personalized video including the personalization area to thereby create a personalized advertisement and displays the personalized video on the device. | 09-23-2010 |
John Kim, Santa Clara, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20100075471 | Recessed Gate Silicon-On-Insulator Floating Body Device With Self-Aligned Lateral Isolation - Embodiments of a manufacturing process for recessed gate devices on silicon-on-insulator (SOI) substrate with self-aligned lateral isolation are described. This allows the creation of true in-pitch recessed gate devices without requiring an extra isolation dimension. A lateral isolation trench is formed between pairs of recessed gate devices by etching the silicon-on-insulator area down to a buried oxide layer on which the silicon-on-insulator layer is formed. The position of the trench is self-aligned and defined by the gate width and the dimension of spacers disposed on either side of the gate. The isolation trench is filled with a dielectric material and then etched back to the middle of the SOI body and the remaining volume is filled with a doped conductive material. The doped conductor is subject to a thermal cycle to create source and drain regions of the device through out-diffusion of the doped material. | 03-25-2010 |
| 20100224924 | TECHNIQUES FOR FORMING A CONTACT TO A BURIED DIFFUSION LAYER IN A SEMICONDUCTOR MEMORY DEVICE - Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device. The semiconductor memory device may comprise a substrate comprising an upper layer. The semiconductor memory device may also comprise an array of dummy pillars formed on the upper layer of the substrate and arranged in rows and columns. Each of the dummy pillars may extend upward from the upper layer and have a bottom contact that is electrically connected with the upper layer of the substrate. The semiconductor memory device may also comprise an array of active pillars formed on the upper layer of the substrate and arranged in rows and columns. Each of the active pillars may extend upward from the upper layer and have an active first region, an active second region, and an active third region. Each of the active pillars may also be electrically connected with the upper layer of the substrate. | 09-09-2010 |
| 20110223726 | RECESSED GATE SILICON-ON-INSULATOR FLOATING BODY DEVICE WITH SELF-ALIGNED LATERAL ISOLATION - Embodiments of a manufacturing process for recessed gate devices on silicon-on-insulator (SOI) substrate with self-aligned lateral isolation are described. This allows the creation of true in-pitch recessed gate devices without requiring an extra isolation dimension. A lateral isolation trench is formed between pairs of recessed gate devices by etching the silicon-on-insulator area down to a buried oxide layer on which the silicon-on-insulator layer is formed. The position of the trench is self-aligned and defined by the gate width and the dimension of spacers disposed on either side of the gate. The isolation trench is filled with a dielectric material and then etched back to the middle of the SOI body and the remaining volume is filled with a doped conductive material. The doped conductor is subject to a thermal cycle to create source and drain regions of the device through out-diffusion of the doped material. | 09-15-2011 |
John Kim, Glenview, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20090106529 | FLATTENED BUTTERFLY PROCESSOR INTERCONNECT NETWORK - A multiprocessor computer system comprises a folded butterfly processor interconnect network, the folded butterfly interconnect network comprising a traditional butterfly interconnect network derived from a butterfly network by flattening routers in each row into a single router for each row, and eliminating channels entirely local to the single row. | 04-23-2009 |
| 20100049942 | DRAGONFLY PROCESSOR INTERCONNECT NETWORK - A multiprocessor computer system comprises a dragonfly processor interconnect network that comprises a plurality of processor nodes, a plurality of routers, each router directly coupled to a plurality of terminal nodes, the routers coupled to one another and arranged into a group, and a plurality of groups of routers, such that each group is connected to each other group via at least one direct connection. | 02-25-2010 |
John Kim, Irvine, CA US
John Kim, Chelsea CA
| Patent application number | Description | Published |
|---|---|---|
| 20110253141 | METHODS OF OPERATING DRY POWDER INHALERS HAVING SPIRAL TRAVEL PATHS WITH MICROCARTRIDGES OF DRY POWDER - Dry powder inhalers include: (a) a first generally planar spiral travel path in an inhaler body, wherein the first spiral travel path has a plurality of adjacent curvilinear channels forming lanes with upstanding sidewalls, including an inner lane and an outer lane; and (b) a plurality of discrete sealed microcartridges with substantially rigid bodies disposed in the first travel path, each comprising a pre-metered (typically dose) amount of dry powder, the microcartridges being configured to slidably advance along the first travel path toward an inhalation chamber that merges into an inhalation output port. In operation, at least one microcartridge is held in the inhalation chamber to release the dry powder therein during inhalation. | 10-20-2011 |