Patent application number | Description | Published |
20080217635 | Light emitting devices having current reducing structures and methods of forming light emitting devices having current reducing structures - A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region. | 09-11-2008 |
20080258168 | Semiconductor light emitting device packages and methods - A submount for a light emitting device package includes a rectangular substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed. | 10-23-2008 |
20100140636 | Light Emitting Diode with Improved Light Extraction - A light emitting diode is disclosed that includes an active region and a plurality of exterior surfaces. A light enhancement feature is present on at least portions of one of the exterior surfaces of the diode, with the light enhancement feature being selected from the group consisting of shaping and texturing. A light enhancement feature is present on at least portions of each of the other exterior surfaces of the diode, with these light enhancement features being selected from the group consisting of shaping, texturing, and reflectors. | 06-10-2010 |
20100140637 | Light Emitting Diode with a Dielectric Mirror having a Lateral Configuration - A light emitting diode is disclosed that includes an active structure, a first ohmic contact on the active structure, and a transparent conductive oxide layer on the active structure opposite the first ohmic contact. The transparent conductive oxide layer has a larger footprint than said active structure. A dielectric mirror is positioned on the transparent conductive oxide layer opposite said active structure and a second contact is positioned on the transparent conductive oxide layer opposite the dielectric mirror and separated from the active structure. | 06-10-2010 |
20100252851 | LED PACKAGE WITH INCREASED FEATURE SIZES - A light emitter package having increased feature sizes for improved luminous flux and efficacy. An emitter chip is disposed on a submount with a lens that covers the emitter chip. In some cases, the ratio of the width of the light emitter chip to the width of said lens in a given direction is 0.5 or greater. Increased feature sizes allow the package to emit light more efficiently. Some packages include submounts having dimensions greater than 3.5 mm square used in conjunction with larger emitter chips. Materials having higher thermal conductivities are used to fabricate the submounts, providing the package with better thermal management. | 10-07-2010 |
20110008922 | METHODS OF FORMING LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES - A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region. | 01-13-2011 |
20110284903 | Semiconductor Light Emitting Device Packages and Methods - A submount for a light emitting device package includes a substrate. A first bond pad and a second bond pad are on a first surface of the substrate. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode thereon. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are a the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. Related LED packages and methods of forming LED packages are disclosed. | 11-24-2011 |
20120153343 | METHODS OF FORMING LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES - A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, and an active region between the n-type semiconductor layer and the p-type semiconductor layer. A non-transparent feature, such as a wire bond pad, is on the p-type semiconductor layer or on the n-type semiconductor layer opposite the p-type semiconductor layer, and a reduced conductivity region is in the p-type semiconductor layer or the n-type semiconductor layer and is aligned with the non-transparent feature. The reduced conductivity region may extend from a surface of the p-type semiconductor layer opposite the n-type semiconductor layer towards the active region and/or from a surface of the n-type semiconductor layer opposite the p-type semiconductor layer towards the active region. | 06-21-2012 |
20130119418 | METHODS OF FORMING OPTICAL CONVERSION MATERIAL CAPS AND LIGHT EMITTING DEVICES INCLUDING PRE-FORMED OPTICAL CONVERSION MATERIAL CAPS - A method of forming can be provided by applying an optical conversion material to a mold to form a unitary layer of optical conversion material and removing the unitary layer of optical conversion material from the mold. | 05-16-2013 |
20130146904 | Optoelectronic Structures with High Lumens Per Wafer - An optoelectronic structure includes a wafer, a plurality of light emitting diode structures on a surface of the wafer, and a coating including a wavelength conversion material on the plurality of light emitting diode structures. The light emitting diode structures and the coating are configured to emit white light in response to electrical energy supplied to the light emitting diode structures. The light emitting diode structures from a single wafer are configured to generate an aggregate light output in excess of 800,000 lumens. | 06-13-2013 |
20130292639 | LIGHT EMITTING DEVICES HAVING CURRENT REDUCING STRUCTURES - A light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer and an active region between the p-type semiconductor layer and the n-type semiconductor layer. A bond pad is provided on one of the p-type semiconductor layer or the n-type semiconductor layer, opposite the active region, the bond pad being electrically connected to the one of the p-type semiconductor layer or the n-type semiconductor layer. A conductive finger extends from and is electrically connected to the bond pad. A reduced conductivity region is provided in the light emitting device that is aligned with the conductive finger. A reflector may also be provided between the bond pad and the reduced conductivity region. A reduced conductivity region may also be provided in the light emitting device that is not aligned with the bond pad. | 11-07-2013 |
20140256072 | Semiconductor Light Emitting Device Packages and Methods - A submount for a light emitting device package includes a substrate with a first bond pad and a second bond pad on a first surface. The first bond pad includes a die attach region offset toward a first end of the substrate and configured to receive a light emitting diode. The second bond pad includes a bonding region between the first bond pad and the second end of the substrate and a second bond pad extension that extends from the bonding region along a side of the substrate toward a corner of the substrate at the first end of the substrate. First and second solder pads are on the second surface of the substrate. The first solder pad is adjacent the first end of the substrate and contacts the second bond pad. The second solder pad is adjacent the second end of the substrate and contacts the first bond pad. | 09-11-2014 |