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John A. Miller
John A. Miller, Bloomfield Village, MI US
| Patent application number | Description | Published |
|---|---|---|
| 20100222817 | INTERSPINOUS PROCESS SPACER DEVICE INCLUDING A ROTATABLE RETAINING MEMBER - A spacer device that is to be inserted between the spinous process of adjacent vertebrae. In one embodiment, the spacer device is percutaneously inserted between the spinous process of adjacent vertebrae using minimally invasive surgical procedures. The spacer device includes a body portion having a channel extending therethrough, a plate member attached at one end of the body portion that is larger cross-wise than the body portion, and at least one retaining member attached proximate to an opposite end of the body portion from the plate member. The spacer device is inserted between the spinous process with the retaining member stored within the body portion. A deploying device is inserted into the channel to deploy the retaining member to lock the spacer device in place. | 09-02-2010 |
| 20110046743 | Minimally Invasive Interbody Device - An interbody device that restores the disc space height between two vertebrae during spinal fusion surgery. The device includes a center plate surrounded by a perimeter portion that combine to have a relatively flat configuration in one dimension and relatively wide configuration in a perpendicular dimension. After the disc space has been cleared, the device is inserted into the disc space in a direction so that the wide dimension of the device is substantially parallel to the body of the vertebrae. The device is then rotated so that the wide dimension of the device becomes perpendicular to the vertebral body so as to cause the disc space height to be restored. Bone graft material is then introduced through a fill tube coupled to the device so that the bone graft material is distributed on both sides of the center plate and into the disc space. | 02-24-2011 |
| 20110093013 | INTERSPINOUS PROCESS SPACER INSERTION DEVICE - An interspinous process spacer insertion device that positions an interspinous process spacer between the spinous process of adjacent vertebrae in a minimally invasive percutaneous surgical procedure. The device includes a trocar rod that extends through a cannulated sleeve. The spacer is attached to the end of the cannulated sleeve, where a trocar tip of the trocar rod extends through the spacer. The trocar rod is moved through the cannulated sleeve and an incision in the patient, and is positioned between the spinous process of the vertebra to align the device. The cannulated sleeve is then moved down the trocar rod so that the spacer slides between the spinous process, and the trocar rod is then withdrawn from the patient. The spacer is then rotated so that it locks behind the spinous process, and the cannulated sleeve is detached from the spacer and removed from the patient. | 04-21-2011 |
John A. Miller, Ottawa CA
| Patent application number | Description | Published |
|---|---|---|
| 20110009710 | COMBINATION LEVEL ALARMS AND ALARM PERSISTENCE FOR PATIENT MONITORING - Combination level alarms and alarm persistence for patient monitoring, as well as related methods and apparatus, are disclosed. For a combination level alarm, respective values for multiple physiological conditions are received. A determination is made as to whether the received values satisfy respective alarm criteria for the physiological conditions, and if so, an alarm is raised. An alarm persistence feature involves periodically receiving values of a physiological condition, and determining whether the received values have satisfied an alarm criterion for at least a predetermined portion of a predetermined period of time. If so, an alarm is maintained. Combination alarms and alarm persistence may be implemented individually or together. | 01-13-2011 |
John A. Miller US
| Patent application number | Description | Published |
|---|---|---|
| 20100158642 | LARGE AREA SUBSTRATE PROCESSING SYSTEM WITH BETWEEN CHAMBER PLATFORM - Embodiments of the invention generally relate to a vacuum processing system for processing large area substrates, such as flat panel displays (i.e., LCD, OLED, and other types of flat panel displays), solar panels, and the like. In one embodiment, a vacuum processing system includes a plurality of processing chambers coupled to a vacuum transfer chamber suitable to accommodate a large area substrate and a least one horizontal platform disposed between adjacent processing chambers. The vacuum transfer chamber has a robot disposed therein. The platform is coupled to a base supporting one of the adjacent processing chambers. | 06-24-2010 |
John A. Miller, Shoreview, MN US
| Patent application number | Description | Published |
|---|---|---|
| 20090210747 | FAULT ISOLATION SYSTEM AND METHOD - A mechanism for isolating failures in a digital system is provided. In one embodiment, a fault table is defined for each unit in the system. Related faults are ordered within the table to reflect the time-order in which the faults would be activated during operation of the associated unit. When multiple related faults are reported for a given unit in the system, the fault that is first located when a linear search of the corresponding fault table is conducted is considered the source of the failure within the unit. If faults are reported for multiple units, the source of the failure for the system is identified using at least one of primary and second priority values assigned to the faults, timestamps obtained when the faults are reported, and an order in which the faults are logged. | 08-20-2009 |
John A. Miller, Weimar, CO US
| Patent application number | Description | Published |
|---|---|---|
| 20090166980 | PACKING ASSEMBLY FOR A PUMP - A header ring for use in a stuffing box comprising an annular body portion of an elastomeric material, an annular radially inward projecting sealing lip portion formed on said body portion and an annular, axially facing pedestal portion formed on said body portion, said pedestal portion defining an annularly extending radially inwardly facing pedestal surface, the sealing lip portion defining an annularly extending, radially inward facing sealing surface, the sealing surface and the pedestal surface forming a juncture, at least a portion of the pedestal portion adjacent the juncture and forming the pedestal surface and at least a portion of the sealing lip portion adjacent the juncture and forming a portion of the sealing surface being comprised of a layer of reinforced elastomeric material bonded to the body portion. | 07-02-2009 |
John A. Miller, Wallkill, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20080233751 | IC CHIP UNIFORM DELAYERING METHODS - Methods of uniformly delayering an IC chip are disclosed. One embodiment includes: performing an ash on the wafer including an Al layer thereof and etching the Al layer; polishing an edge of the wafer using a slurry including an approximately 30 μm polishing particles; removing the aluminum layer and at least one metal layer by polishing using a slurry including approximately 9 μm diamond polishing particles and a non-abrasive backside of a polishing sheet; removing any remaining metal layers to a first metal layer by polishing using a slurry including approximately 3 μm diamond polishing particles and the non-abrasive backside of a polishing sheet; removing any scratches by polishing using a slurry including approximately 1 μm diamond polishing particles and the non-abrasive backside of a polishing sheet; and removing the first metal layer to a polyconductor layer by polishing using a colloidal slurry including approximately 0.25 μm diamond polishing particles. | 09-25-2008 |
John A. Miller, Hillsboro, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110131373 | Mirroring Data Between Redundant Storage Controllers Of A Storage System - In one embodiment, the present invention includes canisters to control storage of data in a storage system including a plurality of disks. Each of multiple canisters may have a processor configured for uniprocessor mode and having an internal node identifier to identify the processor and an external node identifier to identify another processor with which it is to mirror cached data. The mirroring of cached data may be performed by communication of non-coherent transactions via the PtP interconnect, wherein the PtP interconnect is according to a cache coherent protocol. Other embodiments are described and claimed. | 06-02-2011 |
John A. Miller, Portland, OR US
| Patent application number | Description | Published |
|---|---|---|
| 20110142067 | DYNAMIC LINK CREDIT SHARING IN QPI - A method and system for dynamic credit sharing in a quick path interconnect link. The method including dividing incoming credit into a first credit pool and a second credit pool; and allocating the first credit pool for a first data traffic queue and allocating the second credit pool for a second data traffic queue in a manner so as to preferentially transmit the first data traffic queue or the second data traffic queue through a link. | 06-16-2011 |