| Patent application number | Description | Published |
| 20090045456 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A method of fabricating a semiconductor device is provided. The method includes forming a gate structure on a substrate. The gate structure includes a patterned gate dielectric layer, a patterned gate conductor layer, a cap layer and a spacer. Next, a first and a second recesses are formed in the substrate on the two sides of the gate structure. Thereafter, a protection layer is formed on the bottom surfaces of the first and the second recesses, and then a etching process is performed to laterally enlarge first and the second recesses towards the direction of the gate structure. Thereafter, a material layer is respectively formed in the first recess and the second recess. Afterward, two source/drain contact regions are respectively formed in the material layers of the first recess and the second recess. | 02-19-2009 |
| 20090081817 | PATTERNING METHOD - A patterning method is provided. In the patterning method, a film is formed on a substrate and a pre-layer information is measured. Next, an etching process is performed to etch the film. The etching process includes a main etching step, an etching endpoint detection step, an extension etching step and an over etching step. An extension etching time for performing the extension etching step is set within 10 seconds based on a predetermined correlation between an extension etching time and the pre-layer information, so as to achieve a required film profile. | 03-26-2009 |
| 20090107954 | METHOD FOR CONTROLLING ADI-AEI CD DIFFERENCE RATIO OF OPENINGS HAVING DIFFERENT SIZES - A method for controlling ADI-AEI CD difference ratios of openings having different sizes is provided. First, a first etching step using a patterned photoresist layer as a mask is performed to form a patterned Si-containing material layer and a polymer layer on sidewalls thereof. Next, a second etching step is performed with the patterned photoresist layer, the patterned Si-containing material layer and the polymer layer as masks to at least remove an exposed portion of a etching resistive layer to form a patterned etching resistive layer. A portion of a target material layer is removed by using the patterned etching resistive layer as an etching mask to form a first and a second openings in the target material layer. The method is characterized by controlling etching parameters of the first and second etching steps to obtain predetermined ADI-AEI CD difference ratios. | 04-30-2009 |
| 20090145877 | METHOD FOR CONTROLLING ADI-AEI CD DIFFERENCE RATIO OF OPENINGS HAVING DIFFERENT SIZES - A method for controlling an ADI-AEI CD difference ratio of openings having different sizes is described. The openings are formed through a silicon-containing material layer, an etching resistive layer and a target material layer in turn. Before the opening etching steps, at least one of the opening patterns in the photoresist mask is altered in size through photoresist trimming or deposition of a substantially conformal polymer layer. A first etching step forming thicker polymer on the sidewall of the wider opening pattern is performed to form a patterned Si-containing material layer. A second etching step is performed to remove exposed portions of the etching resistive layer and the target material layer. At least one parameter among the parameters of the photoresist trimming or polymer layer deposition step and the etching parameters of the first etching step is controlled to obtain a predetermined ADI-AEI CD difference ratio. | 06-11-2009 |
| 20100018944 | PATTERNING METHOD - A patterning method is provided. A patterned photoresist layer is formed on a bottom anti-reflective coating (BARC), having therein an opening exposing a portion of the BARC. The patterned photoresist layer is treated with a first plasma-generating gas including a fluorocarbon species to form a polymer layer on the surface of the PR layer and the sidewall of the opening. The patterned photoresist layer is used as a mask to etch the BARC with a second plasma-generating gas, which includes Ar and H | 01-28-2010 |
| 20100105205 | CLEANING SOLUTION AND SEMICONDCUTOR PROCESS USING THE SAME - A semiconductor process is provided. First, a metal layer, a dielectric layer and a patterned hard mask layer are sequentially formed on a substrate. Thereafter, a portion of the dielectric layer is removed to form an opening exposing the metal layer. Afterwards, a cleaning solution is used to clean the opening. The cleaning solution includes a triazole compound with a content of 0.00275 to 3 wt %, sulfuric acid with a content of 1 to 10 wt %, hydrofluoric acid with a content of 1 to 200 ppm and water. | 04-29-2010 |
| 20110244398 | Patterning method - A patterning method is provided. First, a first mask layer, a second mask layer and a patterned photoresist layer are sequentially formed on a target layer. Thereafter, the second mask layer is etched by using the patterned photoresist layer as a mask, so as to form a patterned second mask layer. Afterwards, a trimming process is performed to the patterned second mask layer. Further, the first mask layer is etched by using the trimmed patterned second mask layer as a mask, so as to form a patterned first mask layer. The patterned photoresist layer is then removed. Next, the target layer is etched by using the patterned first mask layer as a mask. | 10-06-2011 |
| 20110294075 | PATTERNING METHOD - A patterning method of the present invention is described as follows. A mask layer and a patterned photoresist layer are formed on a target layer in sequence, wherein an etching rate of the mask layer is different from an etching rate of the target layer. A plurality of spacers is formed on sidewalls of the patterned photoresist layer respectively, wherein an etching rate of the spacers is different from the etching rate of the mask layer. The patterned photoresist layer is removed to form an opening between any two adjacent spacers. A portion of the mask layer is removed by using the spacers as a mask so as to form a patterned mask layer. A portion of the target layer is removed by using the patterned mask layer as a mask. | 12-01-2011 |