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Jinho Kim

Jinho Kim, Yongin-Si KR

Patent application numberDescriptionPublished
20090051057Diffuser For Aeration - Disclosed is a diffuser installation structure capable of improving uniformity of air bubbles discharged from air bubble discharge holes, restricting the formation of dead zone air bubble discharge holes, and having the tolerance against design deviation. In the installation structure for a diffuser comprising at least one air feeding port and an air bubble discharge wall having a plurality of air bubble discharge holes, the air bubble discharge wall is inclined upward in the direction of increasing distance relative to the air feeding port.02-26-2009
20090314706Cartridge Module of Hollow Fiber Membranes - Disclosed is a cartridge module of hollow fiber membranes, which can be easily mounted on and dismounted from a module mounting frame, and allow a process for removal of the inter-membrane clogging to be performed in an effective and simple manner. The cartridge module is mainly characterized in that a water collecting header has an opened first collected water outlet, which is located at the upper portion of the front surface of the water collecting header and can be opened and closed; and a closed second collected water outlet, which is located at the lower portion of the front surface of the water collecting header and can be opened and closed. The inter-membrane clogging can be very simply removed by dismounting, turning upside down, and remounting the cartridge module.12-24-2009
20110101548DIFFUSER FOR AERATION - Disclosed is a diffuser installation structure capable of improving uniformity of air bubbles discharged from air bubble discharge holes, restricting the formation of dead zone air bubble discharge holes, and having the tolerance against design deviation. In the installation structure for a diffuser comprising at least one air feeding port and an air bubble discharge wall having a plurality of air bubble discharge holes, the air bubble discharge wall is inclined upward in the direction of increasing distance relative to the air feeding port.05-05-2011
20110227215ELECTRONIC DEVICE, PACKAGE INCLUDING THE SAME AND METHOD OF FABRICATING THE PACKAGE - An electronic device, a package including the same, and a method of fabricating the package, the electronic device including a substrate having an operation structure therein; a first passivation layer on a first side of the substrate; and first conductive patterns on a second side of the substrate, the first conductive patterns being electrically connected to the operation structure, wherein the first passivation layer has a higher flexibility than the substrate when the substrate and the first passivation layer are bent.09-22-2011

Jinho Kim, Hwaseong-Si KR

Patent application numberDescriptionPublished
20100097859Nonvolatile memory device - A nonvolatile memory device having a three-dimensional structure includes first word line stacks in which first word lines are stacked; second word line stacks in which second word lines parallel to the first word lines are stacked; first connection lines connecting the first word lines; and second connection lines connecting the second word lines. Each of the first connection lines connects the first word lines located at a common layer, each of the second connection lines connects the second word lines located at a common layer and at least one second word line stack is disposed between a pair of the first word line stacks.04-22-2010
20100133606Three-dimensional semiconductor memory device - A three-dimensional semiconductor memory device includes word lines and gate interlayer insulation layers that are alternatively stacked on a semiconductor substrate while extending in a horizontal direction, a vertical channel layer that faces the word lines and extends upwardly from the semiconductor substrate, and a channel pad that extends from the vertical channel layer and is disposed on an uppermost gate interlayer insulation layer of the gate interlayer insulation layers.06-03-2010
20100207184Semiconductor devices and methods of forming the same - A semiconductor device includes insulating patterns and gate patterns alternately stacked on a substrate; an active pattern on the substrate, which extends upward along sidewalls of the insulating patterns and the gate patterns; data storage patterns interposed between the gate patterns and the active pattern; and a source/drain region disposed in the active pattern between a pair of gate patterns adjacent to each other.08-19-2010
20100240205METHODS OF FABRICATING THREE-DIMENSIONAL NONVOLATILE MEMORY DEVICES USING EXPANSIONS - Provided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating interlayer insulating layers and conductive layers alternately stacked on a substrate and electrically connected to the substrate and floating gates selectively interposed between the semiconductor pillars and the conductive layers. The floating gates are formed in recesses in the conductive layers.09-23-2010
20100254191SEMICONDUCTOR MEMORY DEVICE COMPRISING THREE-DIMENSIONAL MEMORY CELL ARRAY - A semiconductor memory device includes a substantially planar substrate; a memory string vertical to the substrate, the memory string comprising a plurality of storage cells; and a plurality of elongated word lines, each word line including a first portion substantially parallel to the substrate and connected to the memory string and a second portion substantially inclined relative to the substrate and extending above the substrate, wherein a first group of the plurality of word lines are electrically connected to first conductive lines disposed at a first side of the memory string, and a second group of the plurality of word lines are electrically connected to second conductive lines disposed at a second side of the memory string.10-07-2010
20110076819Three-dimensional semiconductor memory device and method of fabricating the same - A method of fabricating a semiconductor memory device includes alternately and repeatedly stacking sacrificial layers and insulating layers on a substrate, forming an active pattern penetrating the sacrificial layers and the insulating layers, continuously patterning the insulating layers and the sacrificial layers to form a trench, removing the sacrificial layers exposed in the trench to form recess regions exposing a sidewall of the active pattern, forming an information storage layer on the substrate, forming a gate conductive layer on the information storage layer, such that the gate conductive layer fills the recess regions and defines an empty region in the trench, the empty region being surrounded by the gate conductive layer, and performing an isotropic etch process with respect to the gate conductive layer to form gate electrodes in the recess regions, such that the gate electrodes are separated from each other.03-31-2011
20110239937APPARATUS AND METHOD FOR TREATING SUBSTRATE - A substrate treating apparatus and method include a load lock chamber providing a space where a process is performed. While a boat supporting the substrate is positioned in the load lock chamber, a cooling member cools an inside of the load lock chamber at different temperatures according to area or region in a vertical direction of the load lock chamber.10-06-2011
20110305083NONVOLATILE MEMORY DEVICE - A nonvolatile memory device having a three-dimensional structure includes first word line stacks in which first word lines are stacked; second word line stacks in which second word lines parallel to the first word lines are stacked; first connection lines connecting the first word lines; and second connection lines connecting the second word lines. Each of the first connection lines connects the first word lines located at a common layer, each of the second connection lines connects the second word lines located at a common layer and at least one second word line stack is disposed between a pair of the first word line stacks.12-15-2011

Jinho Kim, Gyeonggi-Do KR

Patent application numberDescriptionPublished
20080311407Optical film for a display device and method of fabricating the same - An optical film for a display device including a substrate and a coating layer in which a first material has a first range of surface energy value and a second material has a second range of surface energy value smaller than the first range of surface energy value such that the first material is mainly distributed on a first side of the coating layer contacting the substrate and the second material is mainly distributed on a second side of the coating layer opposite to the first side.12-18-2008
20100171163THREE-DIMENSIONAL SEMICONDUCTOR DEVICES INCLUDING SELECT GATE PATTERNS HAVING DIFFERENT WORK FUNCTION FROM CELL GATE PATTERNS - A three-dimensional semiconductor device includes a vertical channel pattern on the substrate, a plurality of cell gate patterns and a select gate pattern stacked on the substrate along the sidewall of the vertical channel pattern, a charge storage pattern between the vertical channel pattern and the cell gate pattern and a select gate pattern between the vertical channel pattern and the select gate pattern. The select gate pattern has a different work function from the cell gate pattern07-08-2010

Jinho Kim, Yuseong-Gu KR

Patent application numberDescriptionPublished
20100081079POLYMER FOR RESIST AND RESIST COMPOSITION MANUFACTURED USING THE SAME - Disclosed are a polymer for a chemically amplified resist represented as04-01-2010

Jinho Kim, Seoul KR

Patent application numberDescriptionPublished
20090155654HEAT RECOVERY APPARATUS AND FUEL CELL HAVING THE SAME - Provided are a heat recovery apparatus recovering heat generated from a membrane electrode assembly (MEA) and transmitting the heat to a fuel spreader so that a temperature difference between the MEA and the fuel spreader inside a fuel cell is reduced, and a fuel cell having the heat recovery apparatus. The fuel spreader supplies fuel having a uniform concentration to the MEA through the heat recovery apparatus, so that a fuel cell having a reduced total volume, a stable performance, and increased energy efficiency can be provided.06-18-2009
20110139226SELECTIVE EMITTER SOLAR CELL - A selective emitter solar cell is discussed. The selective emitter solar cell includes a substrate of a first conductive type, an emitter layer of a second conductive type positioned on a light receiving surface of the substrate, and a plurality of first electrodes that are positioned on the emitter layer and are electrically connected to the emitter layer. The emitter layer includes a first emitter portion having a first impurity concentration and a second emitter portion having a second impurity concentration higher than the first impurity concentration. The second emitter portion includes a first region that directly contacts at least one of the plurality of first electrodes and overlaps the at least one of the plurality of first electrodes and a second region that is positioned around the first region and does not overlap the at least one of the plurality of first electrodes. A line width of the second region is equal to or less than about eight times a line width of each of the plurality of first electrodes.06-16-2011

Patent applications by Jinho Kim, Seoul KR

Jinho Kim, Yongin KR

Patent application numberDescriptionPublished
20110133348DIFFUSER FOR AERATION - Disclosed is a diffuser installation structure capable of improving uniformity of air bubbles discharged from air bubble discharge holes, restricting the formation of dead zone air bubble discharge holes, and having the tolerance against design deviation. In the installation structure for a diffuser comprising at least one air feeding port and an air bubble discharge wall having a plurality of air bubble discharge holes, the air bubble discharge wall is inclined upward in the direction of increasing distance relative to the air feeding port.06-09-2011

Jinho Kim, Paju-Si KR

Patent application numberDescriptionPublished
20120129107METHOD FOR MANUFACTURING A PATTERNED RETARDER - The present disclosure relates to a method for manufacturing the patterned retarder used in the three-dimensional display device. The present disclosure suggests a method for manufacturing a patterned retarder comprising: defining a first retarder region and a second retarder region in the patterned retarder; forming a first polarization pattern at the first retarder region by a partial exposure process having a first exposure energy; and forming a second polarization pattern at the second retarder region by whole exposure process having a second exposure energy. By manufacturing the patterned retarder with lower exposure energy, it is possible to reduce the whole manufacturing takt time, so that the production yield can be enhanced and the production cost can be reduced.05-24-2012