Patent application number | Description | Published |
20100102426 | Dual face package and method of manufacturing the same - Disclosed herein is a dual face package and a method of manufacturing the same. The dual face package includes a semiconductor substrate including a through-electrode connected to a die pad disposed on one side of the semiconductor substrate, and a lower redistribution layer disposed on another side thereof and connected to the through-electrode, an insulating layer including a post electrode connected to the through-electrode, and an upper redistribution layer disposed on one side thereof and connected to the post electrode, and an adhesive layer disposed on the one side of the semiconductor substrate so as to attach the insulating layer to the semiconductor substrate such that the through-electrode is connected to the post electrode. The dual face package is produced by a simple process and is applicable to a large diameter wafer level package. | 04-29-2010 |
20100320624 | DIE PACKAGE INCLUDING ENCAPSULATED DIE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized. | 12-23-2010 |
20110129994 | Method of manufacturing a dual face package - A method of manufacturing a dual face package, including: preparing an upper substrate composed of an insulating layer including a post via-hole; forming a filled electrode in a semiconductor substrate, the filled electrode being connected to a die pad; applying an adhesive layer on one side of the semiconductor substrate including the filled electrode, and attaching the upper substrate to the semiconductor substrate; cutting another side of the semiconductor substrate in a thickness direction, thus making the filled electrode into a through-electrode; and forming a post electrode in the post via-hole, forming an upper redistribution layer connected to the post electrode of the semiconductor substrate, and forming a lower redistribution layer connected to the through-electrode on the other side of the semiconductor substrate. | 06-02-2011 |
Patent application number | Description | Published |
20080304821 | Camera module package and method of manufacturing the same - The present invention relates to a camera module package having flexibility and a method of manufacturing the same. Provided is the camera module package according to the invention including a silicon wafer mounted with the image sensor in the center of a top surface thereof and provided with pads both sides of the image sensor, a lens unit opened to form a convex lens in a mounting portion of the image sensor in an upper part of the wafer, and a flexible board tightly joined to a bottom surface of the wafer and electrically connected to the pads by an internal pattern. The camera module package can be thinly manufactured and since the camera module package has flexibility, the camera module package can be easily attached to a bendable substrate and to the inside an IT apparatus. | 12-11-2008 |
20090014827 | Image sensor module at wafer level, method of manufacturing the same, and camera module - Provided is an image sensor module at the wafer level including a wafer; an image sensor mounted on one surface of the wafer; a wireless communication chip formed outside the image sensor on the one surface of the wafer; and a protective cover installed on the one surface of the wafer. | 01-15-2009 |
20090166859 | Semiconductor device and method of manufacturing the same - Provided is a semiconductor device including a wafer having an electrode pad; an insulating layer that is formed on the wafer and has an exposure hole formed in one side thereof, the exposure layer exposing the electrode pad, and a support post formed in the other side, the support post having a buffer groove; a redistribution layer that is formed on the top surface of the insulating layer and has one end connected to the electrode pad and the other end extending to the support post; an encapsulation layer that is formed on the redistribution layer and the insulating layer and exposes the redistribution layer formed on the support post; and a solder bump that is provided on the exposed portion of the redistribution layer. | 07-02-2009 |
20090166862 | Semiconductor device and method of manufacturing the same - Provided is a semiconductor device including a wafer having an electrode pad; an insulation layer that is formed on the wafer and has an exposure hole exposing the electrode pad; a redistribution layer that is formed on the insulation layer and the exposure hole of the insulation layer and has one end connected to the electrode pad; a conductive post that is formed at the other end of the redistribution layer; an encapsulation layer that is formed on the redistribution layer and the insulation layer such that the upper end portion of the conductive post is exposed; and a solder bump that is formed on the exposed upper portion of the conducive post. | 07-02-2009 |
Patent application number | Description | Published |
20080296577 | Camera module package - There is provided a camera module package including: a substrate having an image sensor disposed on one surface thereof and a pad electrically connected to the image sensor; a protective cap adhered onto the substrate by an adhesive surrounding the image sensor to seal the image sensor, the protective cap transmitting light; and a supporting part surrounding the protective cap, the supporting part adhering and supporting at least one lens formed corresponding to the image sensor. The camera module package is reduced in thickness and size, and minimized in an error of a focal length between the lens and the image sensor, thereby achieving accuracy and high reliability. | 12-04-2008 |
20080296714 | Wafer level package of image sensor and method for manufacturing the same - Provided is a wafer level package of an image sensor capable of simply and easily packaging an image sensor in a packaging process, and a method for manufacturing the same. The wafer level package of an image sensor includes a lower substrate including an image sensor, a conductive pattern coupled to the image sensor, and a plurality of vias coupled to the conductive pattern; a micro lens array film having a plurality of micro lenses corresponding to the image sensor, the micro lenses being formed on the lower substrate; and a sealing line surrounding the image sensor while being spaced apart from the image sensor and being in contact with an upper substrate. The wafer level package may be useful to have an electrical connection structure using vias without any need to a bonding wire, an electrode pad and an electrode lead in the conventional wafer level package since a packaging process is carried out by bonding a wafer for an upper substrate with a plurality of the vias being provided in a wafer for a lower substrate | 12-04-2008 |
20080299706 | Wafer level package fabrication method - Provided is a wafer level package fabrication method. The method includes providing a device substrate wafer including one or more devices on an upper surface thereof, and a bonding pad electrically connected to the device, providing a bonding seal surrounding the device along the bonding pad, bonding a cap substrate wafer to the device substrate wafer through the bonding seal, the cap substrate wafer having a via formed in a region corresponding to the bonding pad, forming an external terminal on the cap substrate wafer, the external terminal being electrically connected to the bonding pad, and cutting the cap substrate wafer and the device substrate wafer along a cutting line to individually separate a plurality of wafer level packages. The method is conducive to reducing product size for miniaturization, is capable of performing a bonding process without wafer deformation or damage, and increases freedom in wafer material selection. | 12-04-2008 |
20130056141 | DIE PACKAGE INCLUDING ENCAPSULATED DIE AND METHOD OF MANUFACTURING THE SAME - Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized | 03-07-2013 |