Patent application number | Description | Published |
20090056119 | Method of fabricating multilayer printed circuit board - Disclosed is a method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey. | 03-05-2009 |
20090073670 | Multilayered printed circuit board and fabricating method thereof - A multilayered printed circuit board and a fabricating method thereof are disclosed. A method that includes repeating processes of forming at least one circuit pattern, and at least one insulation layer that covers the circuit pattern, over a carrier and interconnecting circuit patterns on different layers with vias; stacking a metal stiffener over the insulation layer; repeating processes of forming at least one insulation layer and at least one circuit pattern over the stiffener and interconnecting circuit patterns on different layers with vias; and removing the carrier, can be used to reduce warpage in the board and improve workability. | 03-19-2009 |
20090169837 | Package substrate and manufacturing method thereof - A package substrate and a method of manufacturing the package substrate are disclosed. The method of manufacturing the package substrate may include stacking a second metal layer in which at least one hole is formed over a first metal layer, stacking a barrier layer over the first metal layer exposed in the hole and over the second metal layer, forming at least one bump by filling the hole with a conductive metal, stacking an insulation layer over the bump and forming a circuit pattern over the insulation layer, and removing the first metal layer, the second metal layer, and the barrier layer. | 07-02-2009 |
20100024212 | Method of fabricating multilayer printed circuit board - A method of fabricating a multilayer printed circuit board, which enables the formation of a micro circuit able to be realized through a semi-additive process using the CTE and rigidity of a metal carrier on a thin substrate which is difficult to convey. | 02-04-2010 |
20100139964 | Printed circuit board comprising metal bump and method of manufacturing the same - Disclosed herein is a printed circuit board, including: an upper circuit layer including connection pads made of a conductive metal and buried in an insulation layer; and metal bumps, each having a constant diameter, which are integrated with the connection pads and protrude over the insulation layer. | 06-10-2010 |
20100139969 | Printed circuit board comprising metal bump and method of manufacturing the same - Disclosed herein is a printed circuit board, including: metal bumps having constant diameters and protruding over an insulation layer; a circuit layer formed beneath the insulation layer; and vias passing through the insulation layer to connect the metal bumps with the circuit layer. | 06-10-2010 |
20120211464 | METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD HAVING METAL BUMP - A method of manufacturing a printed circuit board, including: providing a metal layer; forming an insulation layer on the metal layer and then forming via holes for exposing the metal layer in the insulation layer; forming vias charged in the via holes and a circuit layer on the insulation layer; and forming metal bumps at ends of the vias. | 08-23-2012 |
20120231155 | METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD WITH METAL BUMP - A method of manufacturing a printed circuit board, including: applying a dry film on a carrier and then patterning the dry film to form holes for forming metal bumps; forming an upper circuit layer including metal bumps charged in the holes and connection pads on the dry film; forming an insulation layer on the dry film; forming a build-up layer including a lower circuit layer on the insulation layer; removing the carrier; and removing the dry film. | 09-13-2012 |
20130313004 | PACKAGE SUBSTRATE - A package substrate includes a solder resist layer having a level surface, a circuit pattern buried in the solder resist layer, and a bump protruding from the solder resist layer. | 11-28-2013 |