Patent application number | Description | Published |
20080279243 | Distributed Feedback (Dfb) Quantum Dot Laser Structure - A distributed feedback (DFB) quantum dot semiconductor laser structure is provided. The DFB quantum dot semi-conductor laser structure includes: a first clad layer formed on a lower electrode; an optical waveguide (WG) formed on the first clad layer; a grating structure layer formed on the optical WG and including a plurality of periodically disposed gratings; a first separate confinement hetero (SCH) layer formed on the grating structure layer; an active layer formed on the first SCH layer and including at least a quantum dot; a second SCH layer formed on the active layer; a second clad layer formed on the second SCH layer; an ohmic layer formed on the second clad layer; and an upper electrode formed on the ohmic layer. Accordingly, an optical WG is disposed on the opposite side of the active layer from the grating structure layer, thereby increasing single optical mode efficiency. And, an asymmetric multi-electrode structure is used for applying current, thereby maximizing purity and efficiency of the single mode semiconductor laser structure. | 11-13-2008 |
20090012976 | Data Tree Storage Methods, Systems and Computer Program Products Using Page Structure of Flash Memory - A tree data structure is stored in a flash memory device by storing a leaf node and an index node comprising a pointer to the leaf node in a same page of the flash memory device, which may be read on a per-page basis. A modified version of the leaf node and a modified version of the index node may be stored in a new page of the flash memory device when, for example, a key value is added to or deleted from the leaf node. | 01-08-2009 |
20090176653 | ZINC FINGER DOMAIN LIBRARIES - Disclosed are libraries of chimeric zinc finger domains. The libraries can include two or more zinc finger domains from naturally occurring proteins, e.g., mammalian proteins and particularly human proteins. Useful chimeric zinc finger domains can be identified from the library. Also disclosed are the amino acid sequences of zinc finger domains that recognize particular sites. | 07-09-2009 |
20090296766 | QUANTUM DOT LASER DIODE AND METHOD OF MANUFACTURING THE SAME - Provided are a quantum dot laser diode and a method of manufacturing the same. The method of manufacturing a quantum dot laser diode includes the steps of: forming a grating structure layer including a plurality of gratings on a substrate; forming a first lattice-matched layer on the grating structure layer; forming at least one quantum dot layer having at least one quantum dot on the first lattice-matched layer; forming a second lattice-matched layer on the quantum dot layer; forming a cladding layer on the second lattice-matched layer; and forming an ohmic contact layer on the cladding layer. Consequently, it is possible to obtain high gain at a desired wavelength without affecting the uniformity of quantum dots, so that the characteristics of a laser diode can be improved. | 12-03-2009 |
20110165716 | QUANTUM DOT LASER DIODE AND METHOD OF FABRICATING THE SAME - A quantum dot laser diode and a method of fabricating the same are provided. The quantum dot laser diode includes: a first clad layer formed on an InP substrate; a first lattice-matched layer formed on the first clad layer; an active layer formed on the first lattice-matched layer, and including at least one quantum dot layer formed of an InAlAs quantum dot or an InGaPAs quantum dot which is grown by an alternate growth method; a second lattice-matched layer formed on the active layer; a second clad layer formed on the second lattice-matched layer; and an ohmic contact layer formed on the second clad layer. | 07-07-2011 |
Patent application number | Description | Published |
20080254620 | METHOD FOR FABRICATING LANDING PLUG OF SEMICONDUCTOR DEVICE - A method of fabricating a landing plug of a semiconductor device includes performing a double patterning process to separately form a landing plug contact hole for a storage node and a landing plug contact hole for a bit line, thereby facilitating forming a device having a half pitch of 30 nm. | 10-16-2008 |
20090101970 | Semiconductor Device and Method for Manufacturing the Same - A method for manufacturing a semiconductor device including a vertical cell transistor structure may include forming a vertical cell transistor structure over a semiconductor substrate of a cell region; forming an insulating film over the vertical cell transistor structure; planarizing the insulating film to expose a hard mask film disposed at a top portion of the vertical cell transistor structure; and forming a storage node contact by removing the hard mask film. | 04-23-2009 |
20090258467 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method of fabricating a vertical transistor in a semiconductor device improves integration of the semiconductor device according to a design rule. After a semiconductor substrate is etched to form a buried bit line, a gate electrode pattern that surrounds a cylindrical channel region pattern of the vertical transistor is formed, thereby preventing damage to the gate electrode pattern due to an etching process. The gate electrode pattern surrounds the channel region pattern where a width is narrower than second source and drain regions. The second source and drain regions are then deposited over the channel region pattern and the gate electrode pattern. As a result, a neck-shaped channel region does not collapse due to the weight of the second source and drain regions. | 10-15-2009 |
20120171867 | METHOD FOR FABRICATING FINE PATTERN BY USING SPACER PATTERNING TECHNOLOGY - A method for fabricating a fine pattern includes forming a line-shaped partition pattern on an underlayer, adhering a first spacer to the sides of the partition pattern, dividing the first spacer into two line patterns where one line pattern has one end bent by selectively etching the first spacer portion with a division region, adhering a second spacer, which has a connection protrusion filling the division region and connecting to the partition pattern, to the outer side of the two line patterns, and selectively removing the two line patterns. | 07-05-2012 |
Patent application number | Description | Published |
20090169456 | Apparatus for Manufacturing Nanoporous Silica Method Thereof - The present invention relates to an apparatus and a method for manufacturing amorphous nanoporous silica enabling mixing of source materials with accurate equivalence ratio by generating an eddy current using high-speed reaction nozzles and capable of controlling physical properties using a continuous circulation polymerizer which performs high-speed stirring and low-speed stirring and amorphous nanoporous silica prepared by the method, which has a BET surface area of 100-850 m | 07-02-2009 |
20110296089 | PROGRAMMING METHOD AND DEVICE FOR A BUFFER CACHE IN A SOLID-STATE DISK SYSTEM - Provided are a method and apparatus for programming a buffer cache in a Solid State Disk (SSD) system. The buffer cache programming apparatus in the SSD system may include a buffer cache unit to store pages, a memory unit including a plurality of memory chips, and a control unit to select at least one of the page as a victim page, based on a delay occurring when a page is stored in at least one target memory chip among the plurality of memory chips. | 12-01-2011 |
20120085679 | PROTECTION COVER FOR PORTABLE TERMINAL - A protection cover for a portable terminal preferably includes a rear cover, on and from a surface of which the portable terminal is mountable and removable, and a front cover pivotally coupled to the rear cover to open or close access to the portable terminal mounted on the rear cover. Friction members may be provided on at least one of the rear cover and the front cover, respectively, in which the front cover is disposed at a predetermined angle with respect to the rear cover while facing another surface of the rear cover to support the friction members on a planar surface, thereby opening the portable terminal and cradling the portable terminal inclinedly with respect to the planar surface. The protection cover provides both a cradle and a cover in one device. | 04-12-2012 |