Patent application number | Description | Published |
20080241634 | PUMP DRIVING MODULE AND FUEL CELL SYSTEM EQUIPPED WITH THE SAME - A fuel pump driving module used for supplying fuel from a fuel tank to a fuel cell—and more particularly, a driving module for a diaphragm pump, and a fuel cell system equipped with the same—includes a pump controller for generating an ON/OFF signal and a reference pulse to a pump; and a pump driving pulse generation unit for combining the reference pulse according to a predetermined rule to determine a frequency and a duty ratio of the pump driving pulse and activating the pump driving pulse according to the ON/OFF signal to the pump. The pump driving module may be useful to commonly apply a single pump driving module to various manufacturers' fuel pumps, thereby to reduce the fabricating cost of the fuel cell system. | 10-02-2008 |
20090015386 | RFID TAG HAVING AN IMPROVED OPERATIONAL SPEED AND OPERATING METHOD OF THE SAME - A RFID tag and a method of operating it are disclosed which are capable of storing flag data for a period of time and comprises nonvolatile memory. The RFID tag includes an analog block for transmitting/receiving a command and a response by radio frequency and for providing a power-on reset signal and an operational voltage in accordance with the radio transmitting/receiving state. A digital block initiated by the power-on reset signal and supplied with the operational voltage provides a response corresponding to a command referring to storing data in the nonvolatile memory and generates the flag data representing the current data processing state and value. Finally, a short-term memory block supplied with the operational voltage and interfaced with the digital block stores and outputs the flag data via internal nonvolatile capacitors. | 01-15-2009 |
20090027953 | PHASE CHANGE MEMORY DEVICE - A phase change memory device includes a plurality of word lines arranged in a row direction and a plurality of bit lines arranged in a column direction. A plurality of reference bit line and a plurality of clamp bit lines are arranged in the column direction. A cell array block including a phase change resistance cell is arranged where a word line and a bit line intersect. A reference cell array block is formed where a word line and the reference bit line intersect. The reference cell array block is configured to output a reference current. A clamp cell array block is formed where a word line and a clamp bit line intersect. The clamp cell array block is configured to output a clamp current. A sense amplifier is connected to each of the bit lines and is configured to receive a clamp voltage and a reference voltage. | 01-29-2009 |
20090040815 | PHASE CHANGE MEMORY DEVICE USING A MULTIPLE LEVEL WRITE VOLTAGE - A phase change memory device using a multiple level write voltage is described. The phase change memory device includes a cell array unit including a phase change resistance cell positioned at an intersection of a word line and a bit line. A voltage selection adjusting unit is configured to select one of a plurality of multiple voltages in response to a voltage adjusting signal to output a driving voltage. A write driving unit is also configured to finely adjust the voltage level of the driving voltage in response to a voltage fine-adjusting signal to supply the driving voltage to the cell array unit. | 02-12-2009 |
20090058616 | RADIO FREQUENCY IDENTIFICATION DEVICE HAVING NONVOLATILE FERROELECTRIC MEMORY - A RFID device having a nonvolatile ferroelectric memory includes an analog block. A power-on reset unit configured to sense a power voltage and output a power sensing signal is included in the analog block. A radio frequency signal sensing unit is configured to sense the level of a detecting signal corresponding to a radio frequency signal received by the antenna of the RFID device and outputs a radio frequency sensing signal. A power-on reset mixer is configured to synthesize the power sensing signal and the radio frequency sensing signal and outputs a power-on reset signal according to the voltage levels of the power sensing signal and the radio frequency sensing signal. | 03-05-2009 |
20090058654 | RADIO FREQUENCY IDENTIFICATION DEVICE HAVING NONVOLATILE FERROELECTRIC MEMORY - A RFID device having an analog block, a digital block, and a memory block having a nonvolatile ferroelectric memory is presented. The analog block is configured to receive a radio frequency signal so as to output an operating command signal. The digital block is configured to generate and output an address and an operation adjusting signal in response to the operating command signal. The digital block is also configured to output a response signal to the analog block and to generate a flag data corresponding to a data processing state and value. The memory block is configured to read and write a data in a nonvolatile ferroelectric capacitor in response to the operation adjusting signal. The memory block includes a memory unit configured to store the flag data so as to output the flag data to the digital block. | 03-05-2009 |
20090238024 | SEMICONDUCTOR MEMORY DEVICE REMOVING PARASITIC COUPLING CAPACITANCE BETWEEN WORD LINES - A semiconductor memory device includes a main word line shared by a plurality of mats. Each of the mats includes a plurality of sub word lines. A decoding unit is configured to decode a row address bit and output a word line driving signal. A plurality of sub word line driving units are each configured to activate one of the sub word lines according to the word line driving signal. In the semiconductor memory device each neighboring sub word line driving units is connected to a different main word line to remove parasitic coupling capacitance. | 09-24-2009 |
20100046313 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF - A semiconductor memory device includes a plurality of wordlines and a driver configured to, when an wordline of the plurality of wordlines is activated by an active command, drive at least one non-activated wordline neighboring the activated wordline and remaining non-activated wordlines with different wordline driving voltage levels during a period of time that the activated wordline is driven to a high voltage level. | 02-25-2010 |
20100097833 | PHASE CHANGE MEMORY DEVICE - A phase change memory device includes a plurality of word lines arranged in a row direction and a plurality of bit lines arranged in a column direction. A plurality of reference bit line and a plurality of clamp bit lines are arranged in the column direction. A cell array block including a phase change resistance cell is arranged where a word line and a bit line intersect. A reference cell array block is formed where a word line and the reference bit line intersect. The reference cell array block is configured to output a reference current. A clamp cell array block is formed where a word line and a clamp bit line intersect. The clamp cell array block is configured to output a clamp current. A sense amplifier is connected to each of the bit lines and is configured to receive a clamp voltage and a reference voltage. | 04-22-2010 |
20120294097 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF - A semiconductor memory device includes a plurality of wordlines and a driver configured to, when an wordline of the plurality of wordlines is activated by an active command, drive at least one non-activated wordline neighboring the activated wordline and remaining non-activated wordlines with different wordline driving voltage levels during a period of time that the activated wordline is driven to a high voltage level. | 11-22-2012 |
20120314525 | SEMICONDUCTOR MEMORY DEVICE AND DRIVING METHOD THEREOF - A semiconductor memory device includes a plurality of wordlines and a driver configured to, when an wordline of the plurality of wordlines is activated by an active command, drive at least one non-activated wordline neighboring the activated wordline and remaining non-activated wordlines with different wordline driving voltage levels during a period of time that the activated wordline is driven to a high voltage level. | 12-13-2012 |